On Thu, Mar 14, 2019 at 10:38:39PM +0000, Chris Wilson wrote: > The basic setup of the i915_hw_ppgtt is the same between gen6 and gen8, > so refactor that into a common routine. > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Bob Paauwe <bob.j.paauwe@xxxxxxxxx> > Cc: Matthew Auld <matthew.william.auld@xxxxxxxxx> > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_gem_gtt.c | 43 +++++++++++++---------------- > 1 file changed, 19 insertions(+), 24 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c > index 83362c8ac110..b8055c8d4e71 100644 > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c > @@ -1513,6 +1513,23 @@ static int gen8_preallocate_top_level_pdp(struct i915_hw_ppgtt *ppgtt) > return -ENOMEM; > } > > +static void ppgtt_init(struct drm_i915_private *i915, > + struct i915_hw_ppgtt *ppgtt) > +{ > + kref_init(&ppgtt->ref); > + > + ppgtt->vm.i915 = i915; > + ppgtt->vm.dma = &i915->drm.pdev->dev; > + ppgtt->vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size); > + > + i915_address_space_init(&ppgtt->vm, VM_CLASS_PPGTT); > + > + ppgtt->vm.vma_ops.bind_vma = ppgtt_bind_vma; > + ppgtt->vm.vma_ops.unbind_vma = ppgtt_unbind_vma; > + ppgtt->vm.vma_ops.set_pages = ppgtt_set_pages; > + ppgtt->vm.vma_ops.clear_pages = clear_pages; > +} > + > /* > * GEN8 legacy ppgtt programming is accomplished through a max 4 PDP registers > * with a net effect resembling a 2-level page table in normal x86 terms. Each > @@ -1529,17 +1546,11 @@ static struct i915_hw_ppgtt *gen8_ppgtt_create(struct drm_i915_private *i915) > if (!ppgtt) > return ERR_PTR(-ENOMEM); > > - kref_init(&ppgtt->ref); > - > - ppgtt->vm.i915 = i915; > - ppgtt->vm.dma = &i915->drm.pdev->dev; > - ppgtt->vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size); > + ppgtt_init(i915, ppgtt); > > /* From bdw, there is support for read-only pages in the PPGTT. */ > ppgtt->vm.has_read_only = true; > > - i915_address_space_init(&ppgtt->vm, VM_CLASS_PPGTT); > - > /* There are only few exceptions for gen >=6. chv and bxt. > * And we are not sure about the latter so play safe for now. > */ > @@ -1583,11 +1594,6 @@ static struct i915_hw_ppgtt *gen8_ppgtt_create(struct drm_i915_private *i915) > > ppgtt->vm.cleanup = gen8_ppgtt_cleanup; > > - ppgtt->vm.vma_ops.bind_vma = ppgtt_bind_vma; > - ppgtt->vm.vma_ops.unbind_vma = ppgtt_unbind_vma; > - ppgtt->vm.vma_ops.set_pages = ppgtt_set_pages; > - ppgtt->vm.vma_ops.clear_pages = clear_pages; > - > return ppgtt; > > err_scratch: > @@ -1979,24 +1985,13 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915) > if (!ppgtt) > return ERR_PTR(-ENOMEM); > > - kref_init(&ppgtt->base.ref); > - > - ppgtt->base.vm.i915 = i915; > - ppgtt->base.vm.dma = &i915->drm.pdev->dev; > - ppgtt->base.vm.total = BIT_ULL(INTEL_INFO(i915)->ppgtt_size); > - > - i915_address_space_init(&ppgtt->base.vm, VM_CLASS_PPGTT); > + ppgtt_init(i915, &ppgtt->base); > > ppgtt->base.vm.allocate_va_range = gen6_alloc_va_range; > ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range; > ppgtt->base.vm.insert_entries = gen6_ppgtt_insert_entries; > ppgtt->base.vm.cleanup = gen6_ppgtt_cleanup; > > - ppgtt->base.vm.vma_ops.bind_vma = ppgtt_bind_vma; > - ppgtt->base.vm.vma_ops.unbind_vma = ppgtt_unbind_vma; > - ppgtt->base.vm.vma_ops.set_pages = ppgtt_set_pages; > - ppgtt->base.vm.vma_ops.clear_pages = clear_pages; > - > ppgtt->base.vm.pte_encode = ggtt->vm.pte_encode; > > err = gen6_ppgtt_init_scratch(ppgtt); > -- > 2.20.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx