On Tue, Mar 05, 2019 at 03:47:32PM -0800, José Roberto de Souza wrote:
> A new field with the training pattern(TP) wakeup time for PSR2 was
> added to VBT, so lets use it when available otherwise it will
> fallback to PSR1 wakeup time.
>
> v2: replacing enum to numerical usec time (Jani)
>
> BSpec: 20131
>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxx>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_bios.c | 25 +++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_psr.c | 8 ++++----
> drivers/gpu/drm/i915/intel_vbt_defs.h | 3 +++
> 4 files changed, 33 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ff039750069d..661dce6ccb90 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1006,6 +1006,7 @@ struct intel_vbt_data {
> enum psr_lines_to_wait lines_to_wait;
> int tp1_wakeup_time_us;
> int tp2_tp3_wakeup_time_us;
> + int psr2_tp2_tp3_wakeup_time_us;
> } psr;
>
> struct {
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index b508d8a735e0..ecc352ec7715 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -760,6 +760,31 @@ parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
> dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
> dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
> }
> +
> + if (bdb->version >= 226) {
> + u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;
> +
> + wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
> + switch (wakeup_time) {
> + case 0:
> + wakeup_time = 500;
> + break;
> + case 1:
> + wakeup_time = 100;
> + break;
> + case 3:
> + wakeup_time = 50;
> + break;
> + default:
> + case 2:
> + wakeup_time = 2500;
> + break;
> + }
> + dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
> + } else {
> + /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
> + dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;
> + }
> }
>
> static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 75c1a5deebf5..831f345b4ad8 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -511,12 +511,12 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
>
> val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv->psr.sink_sync_latency + 1);
>
> - if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us >= 0 &&
> - dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 50)
> + if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 &&
> + dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 50)
> val |= EDP_PSR2_TP2_TIME_50us;
> - else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 100)
> + else if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 100)
> val |= EDP_PSR2_TP2_TIME_100us;
> - else if (dev_priv->vbt.psr.tp2_tp3_wakeup_time_us <= 500)
> + else if (dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us <= 500)
> val |= EDP_PSR2_TP2_TIME_500us;
> else
> val |= EDP_PSR2_TP2_TIME_2500us;
> diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
> index bf3662ad5fed..fdbbb9a53804 100644
> --- a/drivers/gpu/drm/i915/intel_vbt_defs.h
> +++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
> @@ -772,6 +772,9 @@ struct psr_table {
> /* TP wake up time in multiple of 100 */
> u16 tp1_wakeup_time;
> u16 tp2_tp3_wakeup_time;
> +
> + /* PSR2 TP2/TP3 wakeup time for 16 panels */
> + u32 psr2_tp2_tp3_wakeup_time;
> } __packed;
>
> struct bdb_psr {
> --
> 2.21.0
>
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