Quoting Chris Wilson (2019-01-08 12:28:18)
> Broadwater and the rest of gen4 do support being able to saving and
> reloading context specific registers between contexts, providing isolation
> of the basic GPU state (as programmable by userspace). This allows
> userspace to assume that the GPU retains their state from one batch to the
> next, minimising the amount of state it needs to reload and manually save
> across batches.
Well Crestline's render context contains a nasty booby trap.
[ 152.065764] hangcheck rcs0
[ 152.065770] hangcheck current seqno 1b89, last 1bc5, hangcheck 1b89 [5984 ms]
[ 152.065773] hangcheck Reset count: 0 (global 0)
[ 152.065774] hangcheck Requests:
[ 152.065779] hangcheck first 1b8a* [5:1b8a] @ 7376ms: rcs0
[ 152.065783] hangcheck last 1bc5+ [5:1bc5] @ 7328ms: rcs0
[ 152.065786] hangcheck active 1b8a* [5:1b8a] @ 7376ms: rcs0
[ 152.065789] hangcheck ring->start: 0x00004000
[ 152.065792] hangcheck ring->head: 0x00017dd0
[ 152.065794] hangcheck ring->tail: 0x00019fb0
[ 152.065795] hangcheck ring->emit: 0x00019fb0
[ 152.065797] hangcheck ring->space: 0x000050a0
[ 152.065801] hangcheck [head 17df0, postfix 17e60, tail 17e80, batch 0x00000000_00335000]:
[ 152.065809] hangcheck [0000] 02000002 7a004002 1fffe004 00000000 00000000 02000000 02000000 02000000
[ 152.065813] hangcheck [0020] 02000000 02000000 02000000 02000000 02000000 02000000 02000000 02000000
[ 152.065817] hangcheck [0040] 02000000 7a004002 1fffe004 00000000 00000000 02000002 00000000 0c000000
[ 152.065821] hangcheck [0060] 0032f10c 00000000 18800180 00335000 02000000 10800001 00000100 00001b8a
[ 152.065825] hangcheck [0080] 10800001 000000c0 00001b8a 01000000
[ 152.065829] hangcheck CCID: 0x0003210d
[ 152.065831] hangcheck RING_START: 0x00004000
[ 152.065834] hangcheck RING_HEAD: 0x00017e54
[ 152.065836] hangcheck RING_TAIL: 0x00019fb0
[ 152.065839] hangcheck RING_CTL: 0x0001f001
[ 152.065841] hangcheck RING_MODE: 0x00000040
[ 152.065844] hangcheck ACTHD: 0x00000000_00e17e54
[ 152.065847] hangcheck BBADDR: 0x00000000_002f81e0
[ 152.065849] hangcheck DMA_FADDR: 0x00000000_0001be50
[ 152.065851] hangcheck IPEIR: 0x00000000
[ 152.065853] hangcheck IPEHR: 0x60020100 # CONSTANT_BUFFER see 0x1d4
[ 152.065860] hangcheck E 1b8a* [5:1b8a] @ 7376ms: rcs0
[ 152.065864] hangcheck E 1b8b+ [5:1b8b] @ 7376ms: rcs0
[ 152.065867] hangcheck E 1b8c [5:1b8c] @ 7376ms: rcs0
[ 152.065870] hangcheck E 1b8d [5:1b8d] @ 7376ms: rcs0
[ 152.065873] hangcheck E 1b8e [5:1b8e] @ 7376ms: rcs0
[ 152.065877] hangcheck E 1b8f [5:1b8f] @ 7376ms: rcs0
[ 152.065880] hangcheck E 1b90 [5:1b90] @ 7372ms: rcs0
[ 152.065888] hangcheck ...skipping 52 executing requests...
[ 152.065891] hangcheck E 1bc5+ [5:1bc5] @ 7328ms: rcs0
[ 152.065893] hangcheck Queue priority: -2147483648
[ 152.065909] hangcheck HWSP:
[ 152.065913] hangcheck [0000] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.065915] hangcheck *
[ 152.065919] hangcheck [00c0] 00001b89 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.065923] hangcheck [00e0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.065927] hangcheck [0100] 00001b89 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.065931] hangcheck [0120] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.065933] hangcheck *
[ 152.065945] hangcheck Context:
[ 152.065960] hangcheck [0000] 00000000 1100002b 00002120 ffff6800 00002124 ffff0180 000020e4 ffff0044
[ 152.065966] hangcheck [0020] 000020c0 ffff0000 00002310 00000010 00002314 00000000 00002318 00000008
[ 152.065970] hangcheck [0040] 0000231c 00000000 00002320 00000000 00002324 00000000 00002328 00000000
[ 152.065975] hangcheck [0060] 0000232c 00000000 00002330 00000000 00002334 00000000 00002338 00000000
[ 152.065980] hangcheck [0080] 0000233c 00000000 00002340 00000000 00002344 00000000 00002348 00000000
[ 152.065985] hangcheck [00a0] 0000234c 00000000 00002350 00000000 00002354 00000000 00000000 00000000
[ 152.065990] hangcheck [00c0] 61040000 60010000 00000014 60003f01 0320a020 10000042 60020000 00000001
[ 152.065994] hangcheck [00e0] 61010004 00000001 00316001 00000001 00000001 00000001 61020000 00000000
[ 152.065999] hangcheck [0100] 79000002 00000000 00000000 00000000 79050003 2c08007f 00035000 00000000
[ 152.066004] hangcheck [0120] 00000000 79040002 00000000 f792ec01 0f9fa8a6 79040002 40000000 f7bdfd51
[ 152.066009] hangcheck [0140] 2fdfb8e7 79040002 80000000 7392fc15 efdfacb6 79040002 c0000000 b5d2ec43
[ 152.066014] hangcheck [0160] 4fffabae 79010003 00000000 00000000 00000000 00000000 79090000 1ac4814a
[ 152.066019] hangcheck [0180] 79060000 00001603 79080001 8020d7bb 1eb70165 00000000 00000000 00000000
[ 152.066024] hangcheck [01a0] 78000005 00316160 00000000 00316181 00316140 003160c0 00316040 78010004
[ 152.066028] hangcheck [01c0] 00000000 00000000 00000000 00000000 00000080 60020100 0031e001 00000000
[ 152.066033] hangcheck [01e0] 40400006 00000000 00000000 00000000 00000000 00000000 00026000 00000000
[ 152.066038] hangcheck [0200] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.066043] hangcheck [0220] 780a0001 00000000 00000000 78080043 0000002c 0032e000 00000000 00000000
[ 152.066047] hangcheck [0240] 08000000 00000000 00000000 00000000 10000000 00000000 00000000 00000000
[ 152.066053] hangcheck [0260] 18000000 00000000 00000000 00000000 20000000 00000000 00000000 00000000
[ 152.066058] hangcheck [0280] 28000000 00000000 00000000 00000000 30000000 00000000 00000000 00000000
[ 152.066064] hangcheck [02a0] 38000000 00000000 00000000 00000000 40000000 00000000 00000000 00000000
[ 152.066069] hangcheck [02c0] 48000000 00000000 00000000 00000000 50000000 00000000 00000000 00000000
[ 152.066074] hangcheck [02e0] 58000000 00000000 00000000 00000000 60000000 00000000 00000000 00000000
[ 152.066079] hangcheck [0300] 68000000 00000000 00000000 00000000 70000000 00000000 00000000 00000000
[ 152.066084] hangcheck [0320] 78000000 00000000 00000000 00000000 80000000 00000000 00000000 00000000
[ 152.066089] hangcheck [0340] 78090023 04400000 11130000 00000000 00000000 00000000 00000000 00000000
[ 152.066094] hangcheck [0360] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.066099] hangcheck *
[ 152.066110] hangcheck [03c0] 00000000 00000000 00000000 00000000 00000000 780b0001 00000000 00000000
[ 152.066118] hangcheck [03e0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.066123] hangcheck [0400] 7902000f ff90acdd ffa52f5d ff212a45 ff63edb4 ffa5aaed ffe9b9e5 ffd2ffcc
[ 152.066128] hangcheck [0420] ff65a3fc ff60a110 ff8928f4 ff51ae6d ffb052cd ff11c3f0 ff60bad6 ffc05bc9
[ 152.066133] hangcheck [0440] ffa87c10 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.066138] hangcheck [0460] 7907001f 3c57ff12 30577d53 30136d15 3055fe5b 70577a56 3017dd16 3057fd12
[ 152.066142] hangcheck [0480] b15fd962 387379d4 2257fb10 3043fd30 a4773d50 3417de10 185b651c 3017f512
[ 152.066147] hangcheck [04a0] b819fd54 12576d8a 70c31900 a6666500 f870bd16 31769f3a bc7b5dc2 2497bb48
[ 152.066152] hangcheck [04c0] 30577d32 b0554d12 3c173d1a f0c73f90 7255fd93 307e7c92 381e5f88 24167552
[ 152.066156] hangcheck [04e0] 31532d1a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.066161] hangcheck [0500] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
[ 152.066169] hangcheck *
[ 152.066455] hangcheck Idle? no
[ 152.066456] hangcheck Signals:
[ 152.066459] hangcheck [5:1b8b] @ 7376ms
[ 152.066462] hangcheck [5:1bc5] @ 7328ms
The issue, I think, in that is the CONSTANT_BUFFER command does an
immediate load from the specified address,
Context:
[01d4] 60020100 CONSTANT_BUFFER
[01d8] 0031e001 address | length
and since this is a context image that address is not known to us and
indeed may not any more be valid (the target buffer having been evicted).
(But if it is a valid address but no longer populated, it should be
reading scratch not hanging?)
The crazy thing is
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/inte
index 18fa319..e2aab92 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1709,6 +1709,17 @@ static inline int mi_set_context(struct i915_request *rq,
int len;
u32 *cs;
+ cs = intel_ring_begin(rq, 4);
+ if (IS_ERR(cs))
+ return PTR_ERR(cs);
+
+ *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
+ *cs++ = 0;
+ *cs++ = i915_ggtt_offset(rq->hw_context->state) + 0x1d4;
+ *cs++ = 0x60020000; // replace active CONSTANT_BUFFER with inactive
+
+ intel_ring_advance(rq, cs);
+
works.
Eh?
-Chris
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