Quoting Tvrtko Ursulin (2019-01-08 13:22:46) > From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > > Configuring RPCS in context image just before pin is sufficient and will > come extra handy in one of the following patches. > > v2: > * Split image setup a bit differently. (Chris Wilson) > > v3: > * Update context image after reset as well - otherwise the application > of pinned default state clears the RPCS. > > v4: > * Use local variable throughout the function. (Chris Wilson) > > Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> > Suggested-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> <SNIP> > +static u32 make_rpcs(struct drm_i915_private *dev_priv); This will be gotten rid of in upcoming patches, so ok. > if (rcs) { > regs[CTX_LRI_HEADER_2] = MI_LOAD_REGISTER_IMM(1); > - CTX_REG(regs, CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE, > - make_rpcs(dev_priv)); > + CTX_REG(regs, CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE, 0); While here, we could poison the value with something nasty as code flow assumes it to be overwritten in next call. Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Regards, Joonas _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx