Re: [PATCH 6/6] drm/i915/icl: Update port clock in compute config

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> -----Original Message-----
> From: Kulkarni, Vandita
> Sent: Tuesday, November 27, 2018 3:09 PM
> To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Chauhan, Madhav <madhav.chauhan@xxxxxxxxx>; Nikula, Jani
> <jani.nikula@xxxxxxxxx>; Syrjala, Ville <ville.syrjala@xxxxxxxxx>; Kulkarni,
> Vandita <vandita.kulkarni@xxxxxxxxx>
> Subject: [PATCH 6/6] drm/i915/icl: Update port clock in compute config
> 
> For DSI 8X clock is AFE clock which is
> is 5 times port clock.

This description need to be rewritten atleast removal of "is" duplication.

> 
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>
> ---
>  drivers/gpu/drm/i915/icl_dsi.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
> index 80382fb..2812129 100644
> --- a/drivers/gpu/drm/i915/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/icl_dsi.c
> @@ -1183,6 +1183,7 @@ static bool gen11_dsi_compute_config(struct
> intel_encoder *encoder,
>  		pipe_config->cpu_transcoder = TRANSCODER_DSI_0;
> 
>  	pipe_config->clock_set = true;
> +	pipe_config->port_clock = intel_dsi_bitrate(intel_dsi)/5;
> 
>  	//TODO: Add check if DSI PLL calculation is done

We won't need this "TODO" now.

With these fixes,
Reviewed-by: Madhav Chauhan <madhav.chauhan@xxxxxxxxx>

Regards,
Madhav

> 
> --
> 1.9.1

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