On Thu, Nov 15, 2018 at 04:23:46PM +0200, Ville Syrjälä wrote: > On Thu, Nov 15, 2018 at 05:21:46AM -0000, Patchwork wrote: > > == Series Details == > > > > Series: drm/i915: Program SKL+ watermarks/ddb more carefully (rev7) > > URL : https://patchwork.freedesktop.org/series/51878/ > > State : failure > > > > == Summary == > > > > = CI Bug Log - changes from CI_DRM_5140_full -> Patchwork_10827_full = > > > > == Summary - FAILURE == > > > > Serious unknown changes coming with Patchwork_10827_full absolutely need to be > > verified manually. > > > > If you think the reported changes have nothing to do with the changes > > introduced in Patchwork_10827_full, please notify your bug team to allow them > > to document this new failure mode, which will reduce false positives in CI. > > > > > > > > == Possible new issues == > > > > Here are the unknown changes that may have been introduced in Patchwork_10827_full: > > > > === IGT changes === > > > > ==== Possible regressions ==== > > > > igt@prime_vgem@basic-fence-flip: > > shard-apl: PASS -> DMESG-WARN > > shard-kbl: PASS -> DMESG-WARN > > > <3> [72.612353] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A cursor level 0 (expected e=0 b=0 l=0, got e=1 b=3 l=1) > <3> [72.612661] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A cursor level 1 (expected e=0 b=0 l=0, got e=1 b=4 l=1) > <3> [72.612784] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A cursor level 2 (expected e=0 b=0 l=0, got e=1 b=4 l=1) > <3> [72.612905] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A cursor level 3 (expected e=0 b=0 l=0, got e=1 b=6 l=2) > <3> [72.613026] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A cursor level 4 (expected e=0 b=0 l=0, got e=1 b=6 l=2) > <3> [72.613147] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A cursor level 5 (expected e=0 b=0 l=0, got e=1 b=6 l=2) > <3> [72.613267] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A cursor level 6 (expected e=0 b=0 l=0, got e=1 b=6 l=2) > <3> [72.613388] [drm:verify_wm_state [i915]] *ERROR* mismatch in WM pipe A cursor level 7 (expected e=0 b=0 l=0, got e=1 b=6 l=2) > > I suspect this would be caused by the cursor becoming fully clipped > but still logically enabled (fb != NULL) during the previous test > (kms_chv_cursor_fail). And then when it comes time to turn off the > pipe we won't reprogram the cursor because its visibility didn't > change and thus we won't clear its watermarks either. I think I'm > going to write a targeted test for that just to make sure my > analysis is correct. Actually that can't be it I think. There was no complaint about a non-zero DDB allocation left behind, so somehow we've got non-zero watermarks with no DDB allocated. That doesn't quite make sense. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
