From: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> It is more space efficient to store these two at the runtime copy since both are trivially derived from the static data. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Jani Nikula <jani.nikula@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.c | 15 +++++++++---- drivers/gpu/drm/i915/i915_drv.h | 28 ++++++++++++++---------- drivers/gpu/drm/i915/i915_pci.c | 4 ++-- drivers/gpu/drm/i915/intel_device_info.h | 6 ++--- drivers/gpu/drm/i915/intel_uncore.c | 2 +- 5 files changed, 33 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 77dd7763b334..4f5ddc3d2f4d 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1657,10 +1657,6 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent) i915->info = device_info = match_info; pci_set_drvdata(pdev, &i915->drm); - BUILD_BUG_ON(INTEL_MAX_PLATFORMS > - BITS_PER_TYPE(device_info->platform_mask)); - BUG_ON(device_info->__gen > BITS_PER_TYPE(device_info->gen_mask)); - /* * Early setup of the runtime device info. */ @@ -1681,6 +1677,17 @@ i915_driver_create(struct pci_dev *pdev, const struct pci_device_id *ent) runtime_info->ring_mask = device_info->__ring_mask; runtime_info->num_pipes = device_info->__num_pipes; + /* + * Initialize GEN and platform masks. + */ + BUILD_BUG_ON(INTEL_MAX_PLATFORMS > + BITS_PER_TYPE(runtime_info->platform_mask)); + + BUG_ON(INTEL_GEN(i915) > BITS_PER_TYPE(runtime_info->gen_mask)); + + runtime_info->gen_mask = BIT(INTEL_GEN(i915) - 1); + runtime_info->platform_mask = BIT(device_info->platform); + return i915; } diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 77ef41d53558..283592dd7023 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2365,7 +2365,7 @@ static inline unsigned int i915_sg_segment_size(void) /* Returns true if Gen is in inclusive range [Start, End] */ #define IS_GEN(dev_priv, s, e) \ - (!!(INTEL_INFO(dev_priv)->gen_mask & INTEL_GEN_MASK((s), (e)))) + (!!((dev_priv)->runtime_info.gen_mask & INTEL_GEN_MASK((s), (e)))) /* * Return true if revision is in range [since,until] inclusive. @@ -2375,7 +2375,8 @@ static inline unsigned int i915_sg_segment_size(void) #define IS_REVID(p, since, until) \ (INTEL_REVID(p) >= (since) && INTEL_REVID(p) <= (until)) -#define IS_PLATFORM(dev_priv, p) (INTEL_INFO(dev_priv)->platform_mask & BIT(p)) +#define IS_PLATFORM(dev_priv, p) \ + ((dev_priv)->runtime_info.platform_mask & BIT(p)) #define IS_I830(dev_priv) IS_PLATFORM(dev_priv, INTEL_I830) #define IS_I845G(dev_priv) IS_PLATFORM(dev_priv, INTEL_I845G) @@ -2524,16 +2525,19 @@ static inline unsigned int i915_sg_segment_size(void) * have their own (e.g. HAS_PCH_SPLIT for ILK+ display, IS_foo for particular * chips, etc.). */ -#define IS_GEN2(dev_priv) (!!(INTEL_INFO(dev_priv)->gen_mask & BIT(1))) -#define IS_GEN3(dev_priv) (!!(INTEL_INFO(dev_priv)->gen_mask & BIT(2))) -#define IS_GEN4(dev_priv) (!!(INTEL_INFO(dev_priv)->gen_mask & BIT(3))) -#define IS_GEN5(dev_priv) (!!(INTEL_INFO(dev_priv)->gen_mask & BIT(4))) -#define IS_GEN6(dev_priv) (!!(INTEL_INFO(dev_priv)->gen_mask & BIT(5))) -#define IS_GEN7(dev_priv) (!!(INTEL_INFO(dev_priv)->gen_mask & BIT(6))) -#define IS_GEN8(dev_priv) (!!(INTEL_INFO(dev_priv)->gen_mask & BIT(7))) -#define IS_GEN9(dev_priv) (!!(INTEL_INFO(dev_priv)->gen_mask & BIT(8))) -#define IS_GEN10(dev_priv) (!!(INTEL_INFO(dev_priv)->gen_mask & BIT(9))) -#define IS_GEN11(dev_priv) (!!(INTEL_INFO(dev_priv)->gen_mask & BIT(10))) +#define __IS_GEN(dev_priv, g) \ + (!!((dev_priv)->runtime_info.gen_mask & BIT((g) - 1))) + +#define IS_GEN2(dev_priv) __IS_GEN(dev_priv, 2) +#define IS_GEN3(dev_priv) __IS_GEN(dev_priv, 3) +#define IS_GEN4(dev_priv) __IS_GEN(dev_priv, 4) +#define IS_GEN5(dev_priv) __IS_GEN(dev_priv, 5) +#define IS_GEN6(dev_priv) __IS_GEN(dev_priv, 6) +#define IS_GEN7(dev_priv) __IS_GEN(dev_priv, 7) +#define IS_GEN8(dev_priv) __IS_GEN(dev_priv, 8) +#define IS_GEN9(dev_priv) __IS_GEN(dev_priv, 9) +#define IS_GEN10(dev_priv) __IS_GEN(dev_priv, 10) +#define IS_GEN11(dev_priv) __IS_GEN(dev_priv, 11) #define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp) #define IS_GEN9_LP(dev_priv) (IS_GEN9(dev_priv) && IS_LP(dev_priv)) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 8eb16c54648f..4fff59249932 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -29,8 +29,8 @@ #include "i915_drv.h" #include "i915_selftest.h" -#define PLATFORM(x) .platform = (x), .platform_mask = BIT(x) -#define GEN(x) .__gen = (x), .gen_mask = BIT((x) - 1) +#define PLATFORM(x) .platform = (x) +#define GEN(x) .__gen = (x) #define GEN_DEFAULT_PIPEOFFSETS \ .pipe_offsets = { PIPE_A_OFFSET, PIPE_B_OFFSET, \ diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 9bacd466f4a2..f9e577ccf775 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -148,15 +148,12 @@ struct sseu_dev_info { typedef u8 intel_ring_mask_t; struct intel_device_info { - u16 gen_mask; - u8 __gen; u8 gt; /* GT number, 0 if undefined */ intel_ring_mask_t __ring_mask; /* Rings supported by the HW */ u8 __num_pipes; enum intel_platform platform; - u32 platform_mask; enum intel_ppgtt __ppgtt; unsigned int __page_sizes; /* page sizes supported by the HW */ @@ -188,11 +185,14 @@ struct intel_device_info { struct intel_runtime_device_info { int gen; + u32 platform_mask; + unsigned int num_rings; enum intel_ppgtt ppgtt; unsigned int page_sizes; /* page sizes supported by the HW */ + u16 gen_mask; u16 device_id; intel_ring_mask_t ring_mask; /* Rings supported by the HW */ diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index def498402bbb..b226aae22a03 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1683,7 +1683,7 @@ int i915_reg_read_ioctl(struct drm_device *dev, GEM_BUG_ON(entry->size > 8); GEM_BUG_ON(entry_offset & (entry->size - 1)); - if (INTEL_INFO(dev_priv)->gen_mask & entry->gen_mask && + if (dev_priv->runtime_info.gen_mask & entry->gen_mask && entry_offset == (reg->offset & -entry->size)) break; entry++; -- 2.19.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx