On Thu, Nov 08, 2018 at 04:01:18PM -0800, Matt Roper wrote:
> On Thu, Nov 01, 2018 at 05:06:02PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > If the level 0 latency is 0 we can't do anything. Return an error
> > rather than success.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Is it possible to get 0 latency here? I thought we increased the
> latency to 2us if punit told us that level0=0 (WaWmMemoryReadLatency)?
Yeah, under normal circumstances this shouldn't happen. But you
can zero out the level 0 latency via debugfs. Should probably note
that in the commit message.
>
>
> Matt
>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 6 ++++--
> > 1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 6fa1634e2db5..bd5f16bc7e08 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4703,8 +4703,10 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
> > bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state);
> > uint32_t min_disp_buf_needed;
> >
> > - if (latency == 0 ||
> > - !intel_wm_plane_visible(cstate, intel_pstate)) {
> > + if (latency == 0)
> > + return level == 0 ? -EINVAL : 0;
> > +
> > + if (!intel_wm_plane_visible(cstate, intel_pstate)) {
> > result->plane_en = false;
> > return 0;
> > }
> > --
> > 2.18.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Matt Roper
> Graphics Software Engineer
> IoTG Platform Enabling & Development
> Intel Corporation
> (916) 356-2795
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
