On Tue, Nov 06, 2018 at 04:31:20PM -0800, Anusha Srivatsa wrote: > If the panel supports FEC, the driver has to > set the FEC_READY bit in the dpcd register: > FEC_CONFIGURATION. > > This has to happen before link training. > > v2: s/intel_dp_set_fec_ready/intel_dp_sink_set_fec_ready > - change commit message. (Gaurav) > > v3: rebased. (r-b Manasi) > > v4: Use fec crtc state, before setting FEC_READY > bit. (Anusha) > > v5: Move to intel_ddi.c > - Make the function static (Anusha) > > v6: Dont pass state as a separate argument (Ville) > > Cc: dri-devel@xxxxxxxxxxxxxxxxxxxxx > Cc: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx> > Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> > Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> > Cc: Manasi Navare <manasi.d.navare@xxxxxxxxx> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> Reviewed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx> Manasi > --- > drivers/gpu/drm/i915/intel_ddi.c | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index 46c1b9e12fbd..850c16200759 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -3051,6 +3051,16 @@ static void icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port) > I915_WRITE(MG_DP_MODE(port, 1), ln1); > } > > +static void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp, > + const struct intel_crtc_state *crtc_state) > +{ > + if (!crtc_state->fec_enable) > + return; > + > + if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, DP_FEC_READY) <= 0) > + DRM_DEBUG_KMS("Failed to get FEC enabled in sink\n"); > +} > + > static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, > const struct intel_crtc_state *crtc_state, > const struct drm_connector_state *conn_state) > @@ -3091,6 +3101,7 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, > intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); > intel_dp_sink_set_decompression_state(intel_dp, crtc_state, > true); > + intel_dp_sink_set_fec_ready(intel_dp, crtc_state); > intel_dp_start_link_train(intel_dp); > if (port != PORT_A || INTEL_GEN(dev_priv) >= 9) > intel_dp_stop_link_train(intel_dp); > -- > 2.19.1 > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx