Quoting kai.chen@xxxxxxxxx (2018-09-06 19:19:02)
> From: Kai Chen <kai.chen@xxxxxxxxx>
>
> On GEN9LP, raise the RPS FUp Interrupt Limiter above softmax so that the
> HW won't miss interrupt when requested max_freq is set back to RP0
> value.
>
> Signed-off-by: Kai Chen <kai.chen@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 15 ++++++++++++++-
> 1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index d99e5fabe93c..bf2494294c9d 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6276,7 +6276,20 @@ static u32 intel_rps_limits(struct drm_i915_private *dev_priv, u8 val)
> * frequency, if the down threshold expires in that window we will not
> * receive a down interrupt. */
> if (INTEL_GEN(dev_priv) >= 9) {
> - limits = (rps->max_freq_softlimit) << 23;
> + int max_freq = rps->max_freq_softlimit;
> + int rp0_freq = rps->rp0_freq;
> +
> + if (IS_GEN9_LP(dev_priv) && (max_freq == rp0_freq))
> + /*
> + * For GEN9_LP, it is suggested to increase the upper
> + * interrupt limiter by 1 (16.6MHz) so that the HW will
> + * generate an interrupt when we are near or just below
> + * the upper limit.
By that explanation there is nothing peculiar to rp0. If the HW
calculation is unstable, it is unstable. One can postulate any number of
rounding errors that could cause an obo error, so without a better
explanation, one would say just increase it by one always.
-Chris
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