Paulo noted that the complexity in the macros for determining the power well register and request/status HW flag offsets is overly complicated. This patchset improves on that by removing the dependence on the power well ID enum when determining these and instead defining the correpsonding power well indices right after their register definitions. While at it the patchset also turns unchanging fields in i915_power_well to const. Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> Cc: Jani Nikula <jani.nikula@xxxxxxxxx> Imre Deak (10): drm/i915/icl: Fix power well anonymous union initializers drm/i915: Rename intel_power_domains_fini() to intel_power_domains_fini_hw() drm/i915/vlv: Remove redundant power well ID asserts drm/i915: Constify power well descriptors drm/i915/vlv: Use power well CTL IDX instead of ID drm/i915/ddi: Use power well CTL IDX instead of ID drm/i915: Remove redundant power well IDs drm/i915: Make power well ID names more uniform drm/i915: Use existing power well IDs where possible drm/i915/icl: Add missing power gate enums drivers/gpu/drm/i915/gvt/handlers.c | 30 +- drivers/gpu/drm/i915/i915_debugfs.c | 4 +- drivers/gpu/drm/i915/i915_drv.c | 12 +- drivers/gpu/drm/i915/i915_drv.h | 34 +- drivers/gpu/drm/i915/i915_reg.h | 271 +++++------ drivers/gpu/drm/i915/intel_display.c | 5 +- drivers/gpu/drm/i915/intel_display.h | 4 +- drivers/gpu/drm/i915/intel_drv.h | 3 +- drivers/gpu/drm/i915/intel_hdcp.c | 6 +- drivers/gpu/drm/i915/intel_runtime_pm.c | 788 +++++++++++++++++++++----------- 10 files changed, 697 insertions(+), 460 deletions(-) -- 2.13.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx