== Series Details == Series: series starting with [1/2] drm/i915/icl: Fix MG PLL setup when refclk is 38.4MHz (rev3) URL : https://patchwork.freedesktop.org/series/44836/ State : failure == Summary == = CI Bug Log - changes from CI_DRM_4343 -> Patchwork_9360 = == Summary - FAILURE == Serious unknown changes coming with Patchwork_9360 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_9360, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://patchwork.freedesktop.org/api/1.0/series/44836/revisions/3/mbox/ == Possible new issues == Here are the unknown changes that may have been introduced in Patchwork_9360: === IGT changes === ==== Possible regressions ==== igt@kms_pipe_crc_basic@nonblocking-crc-pipe-b: fi-glk-j4005: PASS -> FAIL == Known issues == Here are the changes found in Patchwork_9360 that come from known issues: === IGT changes === ==== Issues hit ==== igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713) ==== Possible fixes ==== igt@kms_flip@basic-plain-flip: fi-glk-j4005: DMESG-WARN (fdo#106000) -> PASS igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000 fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097 == Participating hosts (42 -> 38) == Missing (4): fi-ctg-p8600 fi-ilk-m540 fi-bsw-cyan fi-hsw-4200u == Build changes == * Linux: CI_DRM_4343 -> Patchwork_9360 CI_DRM_4343: 93475d62c73031c5b4625eaa64b5c0f4079b2f3f @ git://anongit.freedesktop.org/gfx-ci/linux IGT_4524: 9ab9268fa7eeda0a7ea6eb2ab02bb6c5b9c91ba0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_9360: 01529685e7fbbd57d3f7de473799a45bcd0783e0 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 01529685e7fb drm/i915/icl: Do read-modify-write as needed during MG PLL programming e89ce575e104 drm/i915/icl: Fix MG PLL setup when refclk is 38.4MHz == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9360/issues.html _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
