== Series Details == Series: series starting with [1/2] drm/i915/icl: Fix MG PLL setup when refclk is 38.4MHz (rev2) URL : https://patchwork.freedesktop.org/series/44836/ State : failure == Summary == Applying: drm/i915/icl: Fix MG PLL setup when refclk is 38.4MHz Applying: drm/i915/icl: Do read-modify-write as needed during MG PLL programming error: sha1 information is lacking or useless (drivers/gpu/drm/i915/i915_reg.h). error: could not build fake ancestor Patch failed at 0002 drm/i915/icl: Do read-modify-write as needed during MG PLL programming Use 'git am --show-current-patch' to see the failed patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
