Quoting Tvrtko Ursulin (2018-05-23 15:54:04)
>
> On 22/05/2018 18:59, Lionel Landwerlin wrote:
> > @@ -315,6 +317,13 @@ __create_hw_context(struct drm_i915_private *dev_priv,
> > * is no remap info, it will be a NOP. */
> > ctx->remap_slice = ALL_L3_SLICES(dev_priv);
> >
> > + /* On all engines, use the whole device by default */
> > + for_each_engine(engine, dev_priv, id) {
> > + struct intel_context *ce = to_intel_context(ctx, engine);
> > +
> > + ce->sseu = intel_sseu_from_device_sseu(&INTEL_INFO(dev_priv)->sseu);
> > + }
See a few lines above where we iterate to setup all ce.
> > @@ -2633,7 +2632,8 @@ static void execlists_init_reg_state(u32 *regs,
> > if (rcs) {
> > regs[CTX_LRI_HEADER_2] = MI_LOAD_REGISTER_IMM(1);
> > CTX_REG(regs, CTX_R_PWR_CLK_STATE, GEN8_R_PWR_CLK_STATE,
> > - make_rpcs(dev_priv));
> > + make_rpcs(&INTEL_INFO(dev_priv)->sseu,
> > + ctx->__engine[engine->id].sseu));
>
> to_intel_context(ctx, engine)->sseu ?
ce->sseu. Is it not passed in yet? Or is that part of the virtual engine
patch?
-Chris
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