>From BXT onwards Bspec says HW supports Max Bytes per single RD/WR op is 511Bytes instead of previous 256Bytes used in SW. This change allows the max bytes per op upto 511Bytes from BXT onwards. Cc: Jani Nikula <jani.nikula@xxxxxxxxx> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Signed-off-by: Ramalingam C <ramalingam.c@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_i2c.c | 10 ++++++++-- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 475cac07d3e6..4f583da0cee9 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3013,6 +3013,7 @@ enum i915_power_well_id { #define GMBUS_CYCLE_STOP (4<<25) #define GMBUS_BYTE_COUNT_SHIFT 16 #define GMBUS_BYTE_COUNT_MAX 256U +#define BXT_GMBUS_BYTE_COUNT_MAX 511U #define GMBUS_SLAVE_INDEX_SHIFT 8 #define GMBUS_SLAVE_ADDR_SHIFT 1 #define GMBUS_SLAVE_READ (1<<0) diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index e6875509bcd9..7e92c7934657 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c @@ -400,7 +400,10 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg, int ret; do { - len = min(rx_size, GMBUS_BYTE_COUNT_MAX); + if (INTEL_GEN(dev_priv) >= 9) + len = min(rx_size, BXT_GMBUS_BYTE_COUNT_MAX); + else + len = min(rx_size, GMBUS_BYTE_COUNT_MAX); ret = gmbus_xfer_read_chunk(dev_priv, msg->addr, buf, len, gmbus1_index); @@ -462,7 +465,10 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg, int ret; do { - len = min(tx_size, GMBUS_BYTE_COUNT_MAX); + if (INTEL_GEN(dev_priv) >= 9) + len = min(tx_size, BXT_GMBUS_BYTE_COUNT_MAX); + else + len = min(tx_size, GMBUS_BYTE_COUNT_MAX); ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len, gmbus1_index); -- 2.7.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx