On Mon, Apr 02, 2018 at 10:42:23AM -0700, Pandiyan, Dhinakaran wrote: > > > > On Sat, 2018-03-31 at 00:17 +0000, Souza, Jose wrote: > > On Fri, 2018-03-30 at 16:46 -0700, Pandiyan, Dhinakaran wrote: > > > On Fri, 2018-03-30 at 14:15 -0700, José Roberto de Souza wrote: > > > > This was my bad, spec says that the name of this bit is > > > > 'Y-coordinate valid' but the values for it is: > > > > 0: Include Y-coordinate valid eDP1.4a > > > > 1: Do not include Y-coordinate valid eDP 1.4 > > > > So renaming the bit and not setting it. > > > > > > > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > > > > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > > > > --- > > > > drivers/gpu/drm/i915/i915_reg.h | 2 +- > > > > drivers/gpu/drm/i915/intel_psr.c | 5 ++--- > > > > 2 files changed, 3 insertions(+), 4 deletions(-) > > > > > > > > diff --git a/drivers/gpu/drm/i915/i915_reg.h > > > > b/drivers/gpu/drm/i915/i915_reg.h > > > > index 176dca6554f4..19429cb1f3a7 100644 > > > > --- a/drivers/gpu/drm/i915/i915_reg.h > > > > +++ b/drivers/gpu/drm/i915/i915_reg.h > > > > @@ -4058,7 +4058,7 @@ enum { > > > > #define EDP_PSR2_CTL _MMIO(0x6f900) > > > > #define EDP_PSR2_ENABLE (1<<31) > > > > #define EDP_SU_TRACK_ENABLE (1<<30) > > > > -#define EDP_Y_COORDINATE_VALID (1<<26) /* GLK and CNL+ */ > > > > +#define EDP_Y_COORDINATE_INVALID (1<<26) /* GLK and CNL+ > > > > */ > > > > > > INVALID isn't the same as asking the source to not send the y- > > > coordinate > > > valid bit. Sorry to be pedantic, please leave the definition as it > > > is. > > > > I agree with you, if it don't need to send the y-coordinate is > > better just not set EDP_Y_COORDINATE_ENABLE but leave the bit > > definition name as it is, is prone to others do the same error as I > > did. > > > > I'll let Rodrigo take a call on this one. I agree with DK. Please use the spec name, i.e. "BitField: Y-coordinate valid" "invalid" will actually bring even more confusion. > > -DK > > > > > > > Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> if > > > you > > > remove this hunk. > > > > > > > #define EDP_Y_COORDINATE_ENABLE (1<<25) /* GLK and CNL+ > > > > */ > > > > #define EDP_MAX_SU_DISABLE_TIME(t) ((t)<<20) > > > > #define EDP_MAX_SU_DISABLE_TIME_MASK (0x1f<<20) > > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c > > > > b/drivers/gpu/drm/i915/intel_psr.c > > > > index 2d53f7398a6d..f12111438bcf 100644 > > > > --- a/drivers/gpu/drm/i915/intel_psr.c > > > > +++ b/drivers/gpu/drm/i915/intel_psr.c > > > > @@ -400,9 +400,8 @@ static void hsw_activate_psr2(struct intel_dp > > > > *intel_dp) > > > > * mesh at all with our frontbuffer tracking. And the hw > > > > alone isn't > > > > * good enough. */ > > > > val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE; > > > > - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > > > > { > > > > - val |= EDP_Y_COORDINATE_VALID | > > > > EDP_Y_COORDINATE_ENABLE; > > > > - } > > > > + if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) > > > > + val |= EDP_Y_COORDINATE_ENABLE; > > > > > > > > val |= EDP_PSR2_FRAME_BEFORE_SU(dev_priv- > > > > >psr.sink_sync_latency + 1); > > > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx