On Sat, Feb 24, 2018 at 03:24:55AM +0000, Pandiyan, Dhinakaran wrote: > > > > On Mon, 2018-02-19 at 10:07 +0100, Maarten Lankhorst wrote: > > Op 16-02-18 om 20:27 schreef Pandiyan, Dhinakaran: > > > On Fri, 2018-02-16 at 08:55 +0000, Chris Wilson wrote: > > >> Quoting Dhinakaran Pandiyan (2018-02-16 04:33:21) > > >>> Preparing a framebuffer should not require a flush. _post_plane_update() > > >>> takes care of flushing when a flip is scheduled, this should be > > >>> sufficient for PSR and FBC. > > >> Makes sense. > > >> > > > I also think this might speed up the flips a bit by avoiding flushes. > > > > > >>> Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > > >>> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > >>> Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > >>> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > > >> Also > > >> Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > > >> to validate the flow through atomic. > > >> -Chris > > >> > > Page flips used to do intel_frontbuffer_flip_prepare here, followed by intel_frontbuffer_flip_complete. I think it would make sense to change the patch to do that? > > > > I have no context why it was removed, I'll have to understand that > change and get back to you. Since we supposedly have hw nuke for both fbc and psr there doesn't seem to be much need to do anything for flips. I guess DRRS is the only thing that kinda needs it (not really, just avoids flipping with the slow timings). But I think DRRS should really be tied into the vblank stuff somehow so that we switch to the fast timings whenever a vblank interrupts are enabled. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
