On Wed, 14 Feb 2018, Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote:
> Regular comments where being marked up for kerneldoc, but were not
> formatted properly. Remove the markup to remove the warnings.
>
> drivers/gpu/drm/i915/dvo_ivch.c:192: warning: Function parameter or member 'dvo' not described in 'ivch_read'
> drivers/gpu/drm/i915/dvo_ivch.c:192: warning: Function parameter or member 'addr' not described in 'ivch_read'
> drivers/gpu/drm/i915/dvo_ivch.c:192: warning: Function parameter or member 'data' not described in 'ivch_read'
>
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
Could switch the comments to imperative while at it, but *shrug*.
Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/dvo_ivch.c | 28 ++++++++++++++--------------
> 1 file changed, 14 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/dvo_ivch.c b/drivers/gpu/drm/i915/dvo_ivch.c
> index 4950b82f5b49..c73aff163908 100644
> --- a/drivers/gpu/drm/i915/dvo_ivch.c
> +++ b/drivers/gpu/drm/i915/dvo_ivch.c
> @@ -59,28 +59,28 @@
> * This must not be set while VR01_DVO_BYPASS_ENABLE is set.
> */
> # define VR01_LCD_ENABLE (1 << 2)
> -/** Enables the DVO repeater. */
> +/* Enables the DVO repeater. */
> # define VR01_DVO_BYPASS_ENABLE (1 << 1)
> -/** Enables the DVO clock */
> +/* Enables the DVO clock */
> # define VR01_DVO_ENABLE (1 << 0)
> -/** Enable dithering for 18bpp panels. Not documented. */
> +/* Enable dithering for 18bpp panels. Not documented. */
> # define VR01_DITHER_ENABLE (1 << 4)
>
> /*
> * LCD Interface Format
> */
> #define VR10 0x10
> -/** Enables LVDS output instead of CMOS */
> +/* Enables LVDS output instead of CMOS */
> # define VR10_LVDS_ENABLE (1 << 4)
> -/** Enables 18-bit LVDS output. */
> +/* Enables 18-bit LVDS output. */
> # define VR10_INTERFACE_1X18 (0 << 2)
> -/** Enables 24-bit LVDS or CMOS output */
> +/* Enables 24-bit LVDS or CMOS output */
> # define VR10_INTERFACE_1X24 (1 << 2)
> -/** Enables 2x18-bit LVDS or CMOS output. */
> +/* Enables 2x18-bit LVDS or CMOS output. */
> # define VR10_INTERFACE_2X18 (2 << 2)
> -/** Enables 2x24-bit LVDS output */
> +/* Enables 2x24-bit LVDS output */
> # define VR10_INTERFACE_2X24 (3 << 2)
> -/** Mask that defines the depth of the pipeline */
> +/* Mask that defines the depth of the pipeline */
> # define VR10_INTERFACE_DEPTH_MASK (3 << 2)
>
> /*
> @@ -97,7 +97,7 @@
> * Panel power down status
> */
> #define VR30 0x30
> -/** Read only bit indicating that the panel is not in a safe poweroff state. */
> +/* Read only bit indicating that the panel is not in a safe poweroff state. */
> # define VR30_PANEL_ON (1 << 15)
>
> #define VR40 0x40
> @@ -183,7 +183,7 @@ struct ivch_priv {
>
>
> static void ivch_dump_regs(struct intel_dvo_device *dvo);
> -/**
> +/*
> * Reads a register on the ivch.
> *
> * Each of the 256 registers are 16 bits long.
> @@ -230,7 +230,7 @@ static bool ivch_read(struct intel_dvo_device *dvo, int addr, uint16_t *data)
> return false;
> }
>
> -/** Writes a 16-bit register on the ivch */
> +/* Writes a 16-bit register on the ivch */
> static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
> {
> struct ivch_priv *priv = dvo->dev_priv;
> @@ -258,7 +258,7 @@ static bool ivch_write(struct intel_dvo_device *dvo, int addr, uint16_t data)
> return false;
> }
>
> -/** Probes the given bus and slave address for an ivch */
> +/* Probes the given bus and slave address for an ivch */
> static bool ivch_init(struct intel_dvo_device *dvo,
> struct i2c_adapter *adapter)
> {
> @@ -338,7 +338,7 @@ static void ivch_reset(struct intel_dvo_device *dvo)
> ivch_write(dvo, backup_addresses[i], priv->reg_backup[i]);
> }
>
> -/** Sets the power state of the panel connected to the ivch */
> +/* Sets the power state of the panel connected to the ivch */
> static void ivch_dpms(struct intel_dvo_device *dvo, bool enable)
> {
> int i;
--
Jani Nikula, Intel Open Source Technology Center
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