We never declared that we were about to read from the mmap after copying into using the BLT (a missed call to prime_sync_start); leaving its coherency ill-defined. For completeness, add the missing prime_sync_end() as well. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103168 Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- tests/prime_mmap_coherency.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c index a213ac0f..064c61a7 100644 --- a/tests/prime_mmap_coherency.c +++ b/tests/prime_mmap_coherency.c @@ -98,6 +98,8 @@ static int test_read_flush(void) if (ptr_cpu[i] != 0xc5c5c5c5) stale++; + prime_sync_end(dma_buf_fd, false); + drm_intel_bo_unreference(bo_1); munmap(ptr_cpu, width * height); @@ -141,8 +143,8 @@ static int test_write_flush(void) /* This is the main point of this test: !llc hw requires a cache write * flush right here (explained in step #4). */ prime_sync_start(dma_buf_fd, true); - memset(ptr_cpu, 0x11, width * height); + prime_sync_end(dma_buf_fd, true); /* STEP #3: Copy BO 1 into BO 2, using blitter. */ bo_2 = drm_intel_bo_alloc(bufmgr, "BO 2", width * height * 4, 4096); @@ -159,10 +161,14 @@ static int test_write_flush(void) MAP_SHARED, dma_buf2_fd, 0); igt_assert(ptr2_cpu != MAP_FAILED); + prime_sync_start(dma_buf2_fd, false); + for (i = 0; i < (width * height) / 4; i++) if (ptr2_cpu[i] != 0x11111111) stale++; + prime_sync_end(dma_buf2_fd, false); + drm_intel_bo_unreference(bo_1); drm_intel_bo_unreference(bo_2); munmap(ptr_cpu, width * height); -- 2.15.0.rc1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
