On Sat, Oct 07, 2017 at 09:33:09AM +0100, Chris Wilson wrote: > Quoting Sagar Arun Kamble (2017-10-07 08:07:23) > > With GuC based SLPC, frequency control will be moved to GuC and Host will > > continue to control RC6 and LLC ring frequency setup. This needs separate > > handling of RPS, RC6 and LLC ring frequencies in i915 flows. We still > > continue use the *gt_powersave routines with separate status variables > > for RPS, RC6, ring frequency as pm.rps.enabled, pm.rc6.enabled and > > pm.llc_pstate.configured respectively in dev_priv. > > Post this, with SLPC changes integrated we can just skip the Host RPS path > > in i915 PM flows. > > > > v2: Added new patch 2. Addressed review comments. Pending review for last > > 3 patches and patch 2 currently. > > > > v3: Fixed checkpatch issue in patch 1. Updated patch 6 with new name for > > i915_runtime_pm structure variable as runtime_pm. Added new patch 7 to > > move hw_lock out of rps structure. Updated patch 8 to name rc6/rps/ring > > state as gt_pm. Updated patch 10 to change the llc pstate enable disable > > function names. Removed WARN_ON for pcu_lock from lower level functions > > in patch 11. Also addressed review comments on patch 12. > > It looks ready to go (as in I couldn't see any problems in this series). > Since we are making changes a bit wider than rc6/rps internals (touching > pcode and runtime_pm), we could do with an ack or two from other > interested parties to make sure we are not digging ourselves into a hole. The changes look good and I haven't spotted any problem, so: Acked-by: Imre Deak <imre.deak@xxxxxxxxx> In intel_runtime_suspend() what we want after these changes is to check if rc6 is enabled instead of rps, but that's a detail and can be done as a follow-up. > -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
