No functional change. Just spliting the function for
better port clock handling later.
Cc: Mika Kahola <mika.kahola@xxxxxxxxx>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
---
drivers/gpu/drm/i915/intel_ddi.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 0412035aaa45..593fd18ffbb2 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1301,15 +1301,11 @@ static void cnl_ddi_clock_get(struct intel_encoder *encoder,
ddi_dotclock_get(pipe_config);
}
-static void skl_ddi_clock_get(struct intel_encoder *encoder,
- struct intel_crtc_state *pipe_config)
+static int skl_calc_pll_link(struct drm_i915_private *dev_priv,
+ enum intel_dpll_id pll_id)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
int link_clock = 0;
uint32_t dpll_ctl1;
- enum intel_dpll_id pll_id;
-
- pll_id = intel_get_shared_dpll_id(dev_priv, pipe_config->shared_dpll);
dpll_ctl1 = I915_READ(DPLL_CTRL1);
@@ -1342,10 +1338,20 @@ static void skl_ddi_clock_get(struct intel_encoder *encoder,
WARN(1, "Unsupported link rate\n");
break;
}
- link_clock *= 2;
}
- pipe_config->port_clock = link_clock;
+ return link_clock;
+}
+
+static void skl_ddi_clock_get(struct intel_encoder *encoder,
+ struct intel_crtc_state *pipe_config)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ enum intel_dpll_id pll_id;
+
+ pll_id = intel_get_shared_dpll_id(dev_priv, pipe_config->shared_dpll);
+
+ pipe_config->port_clock = 2 * skl_calc_pll_link(dev_priv, pll_id);
ddi_dotclock_get(pipe_config);
}
--
2.13.5
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