On Wed, 2017-07-12 at 12:20 -0700, Rodrigo Vivi wrote: > Oh HSW the real activate of PSR is decided by the source Typos: On HSW+ > after certain amount of configured idle frames. > > However for the driver perspective where we track psr.active > variable this function here is the actual activate one. So > let's rename it before moving to vfunc with that. > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > Cc: Jim Bride <jim.bride@xxxxxxxxxxxxxxx> > Cc: Vathsala NAgaraju <vathsala.nagaraju@xxxxxxxxx> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_psr.c | 21 +++++++++++---------- > 1 file changed, 11 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c > index 535ea0b7ec20..45c640989a46 100644 > --- a/drivers/gpu/drm/i915/intel_psr.c > +++ b/drivers/gpu/drm/i915/intel_psr.c > @@ -254,7 +254,7 @@ static void vlv_psr_activate(struct intel_dp *intel_dp) > VLV_EDP_PSR_ACTIVE_ENTRY); > } > > -static void intel_enable_source_psr1(struct intel_dp *intel_dp) > +static void hsw_activate_psr1(struct intel_dp *intel_dp) > { > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > struct drm_device *dev = dig_port->base.base.dev; > @@ -307,7 +307,7 @@ static void intel_enable_source_psr1(struct intel_dp *intel_dp) > I915_WRITE(EDP_PSR_CTL, val); > } > > -static void intel_enable_source_psr2(struct intel_dp *intel_dp) > +static void hsw_activate_psr2(struct intel_dp *intel_dp) > { > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > struct drm_device *dev = dig_port->base.base.dev; > @@ -343,17 +343,22 @@ static void intel_enable_source_psr2(struct intel_dp *intel_dp) > I915_WRITE(EDP_PSR2_CTL, val); > } > > -static void hsw_psr_enable_source(struct intel_dp *intel_dp) > +static void hsw_psr_activate(struct intel_dp *intel_dp) > { > struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); > struct drm_device *dev = dig_port->base.base.dev; > struct drm_i915_private *dev_priv = to_i915(dev); > > + /* On HSW+ after we enable PSR on source it will activate it > + * as soon as it match configure idle_frame count. So > + * we just actually enable it here on activation time. > + */ > + > /* psr1 and psr2 are mutually exclusive.*/ > if (dev_priv->psr.psr2_support) > - intel_enable_source_psr2(intel_dp); > + hsw_activate_psr2(intel_dp); > else > - intel_enable_source_psr1(intel_dp); > + hsw_activate_psr1(intel_dp); > } > > static bool intel_psr_match_conditions(struct intel_dp *intel_dp) > @@ -459,11 +464,7 @@ static void intel_psr_activate(struct intel_dp *intel_dp) > > /* Enable/Re-enable PSR on the host */ > if (HAS_DDI(dev_priv)) > - /* On HSW+ after we enable PSR on source it will activate it > - * as soon as it match configure idle_frame count. So > - * we just actually enable it here on activation time. > - */ > - hsw_psr_enable_source(intel_dp); > + hsw_psr_activate(intel_dp); > else > vlv_psr_activate(intel_dp); > _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx