On Wed, Aug 30, 2017 at 09:57:03PM +0300, ville.syrjala@xxxxxxxxxxxxxxx wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Make the min_pixclk thing less confusing by changing it to track > the minimum acceptable cdclk frequency instead. This means moving > the application of the guardbands to a slightly higher level from > the low level platform specific calc_cdclk() functions. > > The immediate benefit is elimination of the confusing 2x factors > on GLK/CNL+ in the audio workarounds (which stems from the fact > that the pipes produce two pixels per clock). > > v2: Keep cdclk higher on CNL to workaround missing DDI clock voltage handling > v3: Squash with the CNL cdclk limits patch (DK) > v4: s/intel_min_cdclk/intel_pixel_rate_to_cdclk/ (DK) > > Cc: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx> > Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > Cc: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx> > Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> I didn't get any objections from the CNL camp, so I went ahead and pushed the series. Thanks for the reviews. -- Ville Syrjälä Intel OTC _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
