Quoting Joonas Lahtinen (2017-08-29 15:54:06) > On Tue, 2017-08-29 at 11:33 +0100, Chris Wilson wrote: > > Since we hold the device wakeref when writing through the GTT (otherwise > > the writes would fail), we presumed that before the device sleeps those > > writes would naturally be flushed and that we wouldn't need our mmio > > read trick. However, that presumption seems false and a sleepy bxt seems > > to require us to always manually flush the GTT writes prior to direct > > access. > > > > Fixes: e2a2aa36a509 ("drm/i915: Check we have an wake device before flushing GTT writes") > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> > > Got any Bugzilla, Testcase, Tested-by? Original bugzilla hasn't been reopened, so I its looks like they were happy enough with the original patches that fixed the problem on my bxt. The testcase seems to be very system dependent, my suspicion is that it has to do with the wacky runtime pm exhibited by CI bxt. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx