Quoting ville.syrjala@xxxxxxxxxxxxxxx (2017-08-18 19:37:00) > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Eliminate the loops from the gen2-3 irq handlers. Since we don't use > MSI anymore on these platforms, and thus the CPU interrupt will be level > triggered, we shouldn't need to play any tricks with IER to induce edges > from IIR. IIR itself still detects only edges from PIPESTAT & co. on > gen4 but since IIR is double buffered and we only clear one bit per irq > handler invocation we can use the normal "clear PIPESTAT & co. -> clear > IIR" approach to ack the interrupts. On gen2 everything is level > triggered, and gen3 presumably follows either the gen2 or gen4 approach > since nothing else would really make sense. > > v2: Drop the IER tricks since we no longer use MSI > > Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> #v1 Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
