From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reposted GMCH irq rework series. A few patches fell out completely since the flip interrupt handling was nuked in the meantime. I also added a patch to remove some more flip irq leftover, and I tossed in a patch to reinstate GMBUS/AUX irqs on gen4/g4x since we no longer use MSI there. I also reordered things a bit to move the HWSTAM stuff towards the end of the series. Entire series available here: git://github.com/vsyrjala/linux.git gmch_irq_redo_3 Ville Syrjälä (16): drm/i915: Don't enable/unmask flip interrupts drm/i915: Clear pipestat consistently drm/i915: s/GEN5/GEN3/ drm/i915: Use GEN3_IRQ_RESET/INIT on gen3/4 drm/i915: Introduce GEN2_IRQ_RESET/INIT drm/i915: Setup EMR first on all gen2-4 drm/i915: Eliminate PORT_HOTPLUG_EN setup from gen3/4 irq_postinstall drm/i915: Unify the appearance of gen3/4 irq_postistall hooks drm/i915: Remove NULL dev_priv checks from irq_uninstall drm/i915: Extract PIPESTAT irq handling into separate functions drm/i915: Rewrite GMCH irq handlers to avoid loops drm/i915: Mask everything in ring HWSTAM on gen6+ in ringbuffer mode drm/i915: Gen3 HWSTAM is actually 32 bits drm/i915: Clean up the HWSTAM mess drm/i915: Remove duplicated irq_preinstall/uninstall hooks drm/i915: Reinstate GMBUS and AUX interrupts on gen4/g4x drivers/gpu/drm/i915/i915_drv.h | 8 +- drivers/gpu/drm/i915/i915_irq.c | 729 ++++++++++++-------------------- drivers/gpu/drm/i915/i915_pci.c | 6 - drivers/gpu/drm/i915/intel_ringbuffer.c | 3 + 4 files changed, 284 insertions(+), 462 deletions(-) -- 2.13.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
