On Thu, Aug 17, 2017 at 06:32:29PM +0100, Chris Wilson wrote: > Forcewake is not affected by the engine reset on gen6+. Indeed the > reason why we added intel_uncore_forcewake_reset() to > gen6_reset_engines() was to keep the bookkeeping intact because the > reset did not touch the forcewake bit (yet we cancelled the forcewake > consumers)! This was done in commit 521198a2e7095: > Author: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > Date: Fri Aug 23 16:52:30 2013 +0300 > > drm/i915: sanitize forcewake registers on reset > > In reset we try to restore the forcewake state to > pre reset state, using forcewake_count. The reset > doesn't seem to clear the forcewake bits so we > get warn on forcewake ack register not clearing. > > That futzing of the forcewake bookkeeping was dropped in commit > 0294ae7b44bb ("drm/i915: Consolidate forcewake resetting to a single > function"), but it did not make the realisation that the remaining > intel_uncore_forcewake_reset() was redundant. > > The new danger with using intel_uncore_forcewake_reset() with per-engine > resets is that the driver and hw are still in an active state as we > perform the reset. We may be using the forcewake to read protected > registers elsewhere and those results may be clobbered by the concurrent > dropping of forcewake. > > Reported-by: Michel Thierry <michel.thierry@xxxxxxxxx> > Fixes: 142bc7d99bcf ("drm/i915: Modify error handler for per engine hang recovery") > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > Cc: Michel Thierry <michel.thierry@xxxxxxxxx> Could this explain some of the random unclaimed register failures we're seeing on hsw shard CI? https://bugs.freedesktop.org/show_bug.cgi?id=102249 Otoh this is in the display well, but maybe we're just racing and it's just a stale bit in the unclaimed mmio debugging stuff. Worth a References: I think. -Daniel > --- > drivers/gpu/drm/i915/intel_uncore.c | 7 +------ > 1 file changed, 1 insertion(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index deb4430541cf..1d7b879cc68c 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -1497,7 +1497,6 @@ static int gen6_reset_engines(struct drm_i915_private *dev_priv, > [VECS] = GEN6_GRDOM_VECS, > }; > u32 hw_mask; > - int ret; > > if (engine_mask == ALL_ENGINES) { > hw_mask = GEN6_GRDOM_FULL; > @@ -1509,11 +1508,7 @@ static int gen6_reset_engines(struct drm_i915_private *dev_priv, > hw_mask |= hw_engine_mask[engine->id]; > } > > - ret = gen6_hw_domain_reset(dev_priv, hw_mask); > - > - intel_uncore_forcewake_reset(dev_priv, true); > - > - return ret; > + return gen6_hw_domain_reset(dev_priv, hw_mask); > } > > /** > -- > 2.14.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx