On Thu, Jul 6, 2017 at 7:40 AM, Imre Deak <imre.deak@xxxxxxxxx> wrote:
> Add an ID for the HSW/BDW global display power well for consistency. The
> ID is selected so that it can be used to get at the HW request and
> status flags with the corresponding GEN9+ macros. Unifying the HSW/BDW
> and GEN9+ versions of these macros and the power well ops using them
> will be done in follow-up patches.
>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
> drivers/gpu/drm/i915/intel_runtime_pm.c | 2 ++
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index ce90847..f798023 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1097,6 +1097,12 @@ enum i915_power_well_id {
> CHV_DISP_PW_PIPE_A, /* 13 */
>
> /*
> + * HSW/BDW
> + * - HSW_PWR_WELL_DRIVER
> + */
> + HSW_DISP_PW_GLOBAL = 15,
for a moment I thought it was custom, but I decided to check and yep,
this is the right one...
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
> +
> + /*
> * GEN9+
> * - HSW_PWR_WELL_DRIVER
> */
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 4a9d955..27c69f9 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -2080,6 +2080,7 @@ static struct i915_power_well hsw_power_wells[] = {
> .name = "display",
> .domains = HSW_DISPLAY_POWER_DOMAINS,
> .ops = &hsw_power_well_ops,
> + .id = HSW_DISP_PW_GLOBAL,
> },
> };
>
> @@ -2095,6 +2096,7 @@ static struct i915_power_well bdw_power_wells[] = {
> .name = "display",
> .domains = BDW_DISPLAY_POWER_DOMAINS,
> .ops = &hsw_power_well_ops,
> + .id = HSW_DISP_PW_GLOBAL,
> },
> };
>
> --
> 2.7.4
>
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--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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