Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
On Thu, Jul 06, 2017 at 05:40:23PM +0300, Imre Deak wrote:
> The power well IDs are used for lookup, so they must be unique on a
> given platform; ensure this on CHV. This didn't cause an actual problem
> since we didn't need to look up power wells which happened to share an
> ID.
>
> Mark this new power well as custom, since its programming pattern
> doesn't follow that of the rest of VLV/CHV power wells.
>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 ++
> drivers/gpu/drm/i915/intel_runtime_pm.c | 10 +++++-----
> 2 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 64cc674..3f7beff 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1077,6 +1077,8 @@ enum punit_power_well {
> PUNIT_POWER_WELL_DPIO_RX0 = 10,
> PUNIT_POWER_WELL_DPIO_RX1 = 11,
> PUNIT_POWER_WELL_DPIO_CMN_D = 12,
> + /* - custom power well */
> + CHV_DISP_PW_PIPE_A, /* 13 */
>
> /* Not actual bit groups. Used as IDs for lookup_power_well() */
> PUNIT_POWER_WELL_ALWAYS_ON,
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 5eb9c5e..5f5dee4 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -1672,7 +1672,7 @@ void chv_phy_powergate_lanes(struct intel_encoder *encoder,
> static bool chv_pipe_power_well_enabled(struct drm_i915_private *dev_priv,
> struct i915_power_well *power_well)
> {
> - enum pipe pipe = power_well->id;
> + enum pipe pipe = PIPE_A;
> bool enabled;
> u32 state, ctrl;
>
> @@ -1702,7 +1702,7 @@ static void chv_set_pipe_power_well(struct drm_i915_private *dev_priv,
> struct i915_power_well *power_well,
> bool enable)
> {
> - enum pipe pipe = power_well->id;
> + enum pipe pipe = PIPE_A;
> u32 state;
> u32 ctrl;
>
> @@ -1735,7 +1735,7 @@ static void chv_set_pipe_power_well(struct drm_i915_private *dev_priv,
> static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv,
> struct i915_power_well *power_well)
> {
> - WARN_ON_ONCE(power_well->id != PIPE_A);
> + WARN_ON_ONCE(power_well->id != CHV_DISP_PW_PIPE_A);
>
> chv_set_pipe_power_well(dev_priv, power_well, true);
>
> @@ -1745,7 +1745,7 @@ static void chv_pipe_power_well_enable(struct drm_i915_private *dev_priv,
> static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv,
> struct i915_power_well *power_well)
> {
> - WARN_ON_ONCE(power_well->id != PIPE_A);
> + WARN_ON_ONCE(power_well->id != CHV_DISP_PW_PIPE_A);
>
> vlv_display_power_well_deinit(dev_priv);
>
> @@ -2184,7 +2184,7 @@ static struct i915_power_well chv_power_wells[] = {
> * required for any pipe to work.
> */
> .domains = CHV_DISPLAY_POWER_DOMAINS,
> - .id = PIPE_A,
> + .id = CHV_DISP_PW_PIPE_A,
> .ops = &chv_pipe_power_well_ops,
> },
> {
> --
> 2.7.4
>
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