Oh! nevermind, please fully ignore my last email!
Fixes: 04416108ccea ("drm/i915/cnl: Add registers related to voltage
swing sequences.")
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
On Thu, Jun 29, 2017 at 9:13 PM, Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> wrote:
> the patch that introduces this error didn't land yet....
>
> so, could we squash to the original patch whenever that is reworked to
> be resent?
>
>
> On Thu, Jun 29, 2017 at 6:14 PM, Manasi Navare
> <manasi.d.navare@xxxxxxxxx> wrote:
>> The Cursor Coeff is lower 6 bits in the PORT_TX_DW4 register
>> and hence the CURSOR_COEFF_MASK should be (0x3F << 0)
>>
>> Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
>> Cc: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx>
>> ---
>> drivers/gpu/drm/i915/i915_reg.h | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>> index c8647cf..64cc674 100644
>> --- a/drivers/gpu/drm/i915/i915_reg.h
>> +++ b/drivers/gpu/drm/i915/i915_reg.h
>> @@ -1802,7 +1802,7 @@ enum skl_disp_power_wells {
>> #define POST_CURSOR_2(x) ((x) << 6)
>> #define POST_CURSOR_2_MASK (0x3F << 6)
>> #define CURSOR_COEFF(x) ((x) << 0)
>> -#define CURSOR_COEFF_MASK (0x3F << 6)
>> +#define CURSOR_COEFF_MASK (0x3F << 0)
>>
>> #define _CNL_PORT_TX_DW5_GRP_AE 0x162354
>> #define _CNL_PORT_TX_DW5_GRP_B 0x1623D4
>> --
>> 2.1.4
>>
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>
>
>
> --
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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