Quoting ville.syrjala@xxxxxxxxxxxxxxx (2017-06-22 12:55:45) > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > Do the irq_mask/enable_mask setup in the same way on gen3/4, and also > reorder the steps to make the code more uniform. > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
