On Fri, Apr 14, 2017 at 09:05:06AM -0700, Daniele Ceraolo Spurio wrote: > On 24/03/17 18:30, Michel Thierry wrote: > >+/* > >+ * Based on time out value in microseconds (us) calculate > >+ * timer count thresholds needed based on core frequency. > >+ * Watchdog can be disabled by setting it to 0. > >+ */ > >+int i915_gem_context_set_watchdog(struct i915_gem_context *ctx, > >+ struct drm_i915_gem_context_param *args) > >+{ > >+ struct drm_i915_private *dev_priv = ctx->i915; > >+ struct intel_engine_cs *engine; > >+ enum intel_engine_id id; > >+ u32 threshold_in_us[I915_NUM_ENGINES]; > >+ > >+ if (!dev_priv->engine[VCS]->emit_start_watchdog) > >+ return -ENODEV; > >+ else if (args->size < sizeof(threshold_in_us)) > >+ return -EINVAL; > > won't we break userspace with this check if we ever get more engines > on a new platform and thus bump I915_NUM_ENGINES? Not really. Userspace uses a 2 step process to first determine the array length it needs to pass to the kernel. It will just fill those rings it doesn't know about with 0. The alternative to using a fixed length array is using an array of (engine-id, threshold) pairs. Which is probably going to be more convenient to userspace. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx