These patches add the reset-engine feature from Gen8. This is also referred to as Timeout detection and recovery (TDR). This complements to the full gpu reset feature available in i915 but it only allows to reset a particular engine instead of all engines thus providing a light weight engine reset and recovery mechanism. Thanks to recent changes merged, this implementation is now not only for execlists, but for GuC based submission too; it is still limited from Gen8 onwards. I have also included the changes for watchdog timeout detection. The GuC related patches can be seen as RFC. Timeout detection relies on the existing hangcheck, which remains the same; main changes are to the recovery mechanism. Once we detect a hang on a particular engine we identify the request that caused the hang, skip the request and adjust head pointers to allow the execution to proceed normally. After some cleanup, submissions are restarted to process remaining work queued to that engine. If engine reset fails to recover engine correctly then we fallback to full gpu reset. We can argue about the effectiveness of reset-engine vs full reset when more than one ring is hung, but the benefits of just resetting one engine are reduced when the driver has to do it multiple times. Note - with guc submission enabled, Fi.CI.BAT is reporting a regression in gem_ringfill@basic-default-hang. But local testing show it can only be reproducible while running IGT v1.7; IGT v1.8 or newer don't show the problem. v2: ELSP queue request tracking and reset path changes to handle incomplete requests during reset. Thanks to Chris Wilson for providing these patches. v3: Let the waiter keep handling the full gpu reset if it already has the lock; point out that GuC submission needs a different method to restart workloads after the engine reset completes. v4: Handle reset as 2 level resets, by first going to engine only and fall backing to full/chip reset as needed, i.e. reset_engine will need the struct_mutex. v5: Rebased after reset flag split in 2, add GuC support, include watchdog detection patches, addressing comments from prev RFC. Cc: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> Arun Siluvery (7): drm/i915: Update i915.reset to handle engine resets drm/i915/tdr: Modify error handler for per engine hang recovery drm/i915/tdr: Add support for per engine reset recovery drm/i915/tdr: Add engine reset count to error state drm/i915/tdr: Export per-engine reset count info to debugfs drm/i915/tdr: Enable Engine reset and recovery support drm/i915/guc: Provide register list to be saved/restored during engine reset Michel Thierry (10): drm/i915: Fix stale comment about I915_RESET_IN_PROGRESS flag drm/i915: Rename gen8_(un)request_engine_reset to gen8_(un)request_reset_engine drm/i915: Add engine reset count in get-reset-stats ioctl drm/i915/selftests: reset engine self tests drm/i915/guc: Add support for reset engine using GuC commands drm/i915: Watchdog timeout: Pass GuC shared data structure during param load drm/i915: Watchdog timeout: IRQ handler for gen8+ drm/i915: Watchdog timeout: Ringbuffer command emission for gen8+ drm/i915: Watchdog timeout: DRM kernel interface to set the timeout drm/i915: Watchdog timeout: Export media reset count from GuC to debugfs Mika Kuoppala (1): drm/i915: Skip reset request if there is one already drivers/gpu/drm/i915/i915_debugfs.c | 49 +++++++ drivers/gpu/drm/i915/i915_drv.c | 150 +++++++++++++++++++++- drivers/gpu/drm/i915/i915_drv.h | 34 ++++- drivers/gpu/drm/i915/i915_gem.c | 16 ++- drivers/gpu/drm/i915/i915_gem_context.c | 92 +++++++++++++- drivers/gpu/drm/i915/i915_gem_context.h | 24 ++++ drivers/gpu/drm/i915/i915_gem_request.c | 5 +- drivers/gpu/drm/i915/i915_gpu_error.c | 14 +- drivers/gpu/drm/i915/i915_guc_submission.c | 98 +++++++++++++- drivers/gpu/drm/i915/i915_irq.c | 32 ++++- drivers/gpu/drm/i915/i915_params.c | 6 +- drivers/gpu/drm/i915/i915_params.h | 2 +- drivers/gpu/drm/i915/i915_pci.c | 5 +- drivers/gpu/drm/i915/i915_reg.h | 6 + drivers/gpu/drm/i915/intel_guc_fwif.h | 26 +++- drivers/gpu/drm/i915/intel_guc_loader.c | 8 ++ drivers/gpu/drm/i915/intel_hangcheck.c | 13 +- drivers/gpu/drm/i915/intel_lrc.c | 155 ++++++++++++++++++++++- drivers/gpu/drm/i915/intel_ringbuffer.h | 24 ++++ drivers/gpu/drm/i915/intel_uc.h | 1 + drivers/gpu/drm/i915/intel_uncore.c | 43 ++++++- drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 148 +++++++++++++++++++++- include/uapi/drm/i915_drm.h | 7 +- 23 files changed, 906 insertions(+), 52 deletions(-) -- 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx