BDW supports RCS slices powering on/off. To do that we need make_rpcs executed on BDW to flash slices configuration. Change-Id: Ia80b1be329bedc57cc61078ea18ecb3d2580c16a Signed-off-by: Dmitry Rogozhkin <dmitry.v.rogozhkin@xxxxxxxxx> CC: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxx> CC: Zhipeng Gong <zhipeng.gong@xxxxxxxxx> CC: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> CC: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/intel_lrc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 2a1b641..bc650df 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1732,7 +1732,7 @@ int logical_xcs_ring_init(struct intel_engine_cs *engine) * No explicit RPCS request is needed to ensure full * slice/subslice/EU enablement prior to Gen9. */ - if (INTEL_GEN(dev_priv) < 9) + if (INTEL_GEN(dev_priv) < 8) return 0; /* -- 1.8.3.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
