On Tue, Mar 28, 2017 at 05:59:11PM +0300, Jani Nikula wrote:
> The source might not support as many lanes as the sink, or the link
> training might have failed at higher lane counts. Take these into
> account.
>
Yes that is true for link fallback to work correctly for MST.
So Reviewed-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
Regards
Manasi
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@xxxxxxxxx>
> Cc: Manasi Navare <manasi.d.navare@xxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/intel_dp_mst.c | 4 ++--
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 3 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index b3df2082eac9..95f2278700e3 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -177,7 +177,7 @@ static int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
> return min(source_max, sink_max);
> }
>
> -static int intel_dp_max_lane_count(struct intel_dp *intel_dp)
> +int intel_dp_max_lane_count(struct intel_dp *intel_dp)
> {
> return intel_dp->max_link_lane_count;
> }
> diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c b/drivers/gpu/drm/i915/intel_dp_mst.c
> index c1f62eb07c07..3451e2abb23b 100644
> --- a/drivers/gpu/drm/i915/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/intel_dp_mst.c
> @@ -56,7 +56,7 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
> * for MST we always configure max link bw - the spec doesn't
> * seem to suggest we should do otherwise.
> */
> - lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
> + lane_count = intel_dp_max_lane_count(intel_dp);
>
> pipe_config->lane_count = lane_count;
>
> @@ -343,7 +343,7 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
> int max_rate, mode_rate, max_lanes, max_link_clock;
>
> max_link_clock = intel_dp_max_link_rate(intel_dp);
> - max_lanes = drm_dp_max_lane_count(intel_dp->dpcd);
> + max_lanes = intel_dp_max_lane_count(intel_dp);
>
> max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
> mode_rate = intel_dp_link_required(mode->clock, bpp);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 9141515e4204..0c037295459b 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1507,6 +1507,7 @@ void intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *co
> void intel_dp_mst_suspend(struct drm_device *dev);
> void intel_dp_mst_resume(struct drm_device *dev);
> int intel_dp_max_link_rate(struct intel_dp *intel_dp);
> +int intel_dp_max_lane_count(struct intel_dp *intel_dp);
> int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
> void intel_dp_hot_plug(struct intel_encoder *intel_encoder);
> void intel_power_sequencer_reset(struct drm_i915_private *dev_priv);
> --
> 2.1.4
>
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