On Thu, Feb 23, 2017 at 07:43:52PM +0200, David Weinehall wrote:
> On Thu, Feb 23, 2017 at 07:35:06PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > Convert the big switch statement in translate_signal_level() into a neat
> > table. The table also serves as documentation for the translation
> > tables. We'll also have other uses for this table later on.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Reviewed-by: David Weinehall <david.weinehall@xxxxxxxxxxxxxxx>
>
> > ---
> > drivers/gpu/drm/i915/intel_ddi.c | 60 ++++++++++++++--------------------------
> > 1 file changed, 21 insertions(+), 39 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> > index 5e4b0172810d..6f8e57f127e5 100644
> > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > @@ -34,6 +34,19 @@ struct ddi_buf_trans {
> > u8 i_boost; /* SKL: I_boost; valid: 0x0, 0x1, 0x3, 0x7 */
> > };
> >
> > +static const u8 index_to_dp_signal_levels[] = {
> > + [0] = DP_TRAIN_VOLTAGE_SWING_LEVEL_0 | DP_TRAIN_PRE_EMPH_LEVEL_0,
> > + [1] = DP_TRAIN_VOLTAGE_SWING_LEVEL_0 | DP_TRAIN_PRE_EMPH_LEVEL_1,
> > + [2] = DP_TRAIN_VOLTAGE_SWING_LEVEL_0 | DP_TRAIN_PRE_EMPH_LEVEL_2,
> > + [3] = DP_TRAIN_VOLTAGE_SWING_LEVEL_0 | DP_TRAIN_PRE_EMPH_LEVEL_3,
> > + [4] = DP_TRAIN_VOLTAGE_SWING_LEVEL_1 | DP_TRAIN_PRE_EMPH_LEVEL_0,
> > + [5] = DP_TRAIN_VOLTAGE_SWING_LEVEL_1 | DP_TRAIN_PRE_EMPH_LEVEL_1,
> > + [6] = DP_TRAIN_VOLTAGE_SWING_LEVEL_1 | DP_TRAIN_PRE_EMPH_LEVEL_2,
> > + [7] = DP_TRAIN_VOLTAGE_SWING_LEVEL_2 | DP_TRAIN_PRE_EMPH_LEVEL_0,
> > + [8] = DP_TRAIN_VOLTAGE_SWING_LEVEL_2 | DP_TRAIN_PRE_EMPH_LEVEL_1,
> > + [9] = DP_TRAIN_VOLTAGE_SWING_LEVEL_3 | DP_TRAIN_PRE_EMPH_LEVEL_0,
> > +};
> > +
> > /* HDMI/DVI modes ignore everything but the last 2 items. So we share
> > * them for both DP and FDI transports, allowing those ports to
> > * automatically adapt to HDMI connections as well
> > @@ -1604,48 +1617,17 @@ static void bxt_ddi_vswing_sequence(struct drm_i915_private *dev_priv,
> >
> > static uint32_t translate_signal_level(int signal_levels)
> > {
> > - uint32_t level;
> > -
> > - switch (signal_levels) {
> > - default:
> > - DRM_DEBUG_KMS("Unsupported voltage swing/pre-emphasis level: 0x%x\n",
> > - signal_levels);
> > - case DP_TRAIN_VOLTAGE_SWING_LEVEL_0 | DP_TRAIN_PRE_EMPH_LEVEL_0:
> > - level = 0;
> > - break;
> > - case DP_TRAIN_VOLTAGE_SWING_LEVEL_0 | DP_TRAIN_PRE_EMPH_LEVEL_1:
> > - level = 1;
> > - break;
> > - case DP_TRAIN_VOLTAGE_SWING_LEVEL_0 | DP_TRAIN_PRE_EMPH_LEVEL_2:
> > - level = 2;
> > - break;
> > - case DP_TRAIN_VOLTAGE_SWING_LEVEL_0 | DP_TRAIN_PRE_EMPH_LEVEL_3:
> > - level = 3;
> > - break;
> > -
> > - case DP_TRAIN_VOLTAGE_SWING_LEVEL_1 | DP_TRAIN_PRE_EMPH_LEVEL_0:
> > - level = 4;
> > - break;
> > - case DP_TRAIN_VOLTAGE_SWING_LEVEL_1 | DP_TRAIN_PRE_EMPH_LEVEL_1:
> > - level = 5;
> > - break;
> > - case DP_TRAIN_VOLTAGE_SWING_LEVEL_1 | DP_TRAIN_PRE_EMPH_LEVEL_2:
> > - level = 6;
> > - break;
> > -
> > - case DP_TRAIN_VOLTAGE_SWING_LEVEL_2 | DP_TRAIN_PRE_EMPH_LEVEL_0:
> > - level = 7;
> > - break;
> > - case DP_TRAIN_VOLTAGE_SWING_LEVEL_2 | DP_TRAIN_PRE_EMPH_LEVEL_1:
> > - level = 8;
> > - break;
> > + int i;
> >
> > - case DP_TRAIN_VOLTAGE_SWING_LEVEL_3 | DP_TRAIN_PRE_EMPH_LEVEL_0:
> > - level = 9;
> > - break;
> > + for (i = 0; i < ARRAY_SIZE(index_to_dp_signal_levels); i++) {
>
> Superfluous space between < and ARRAY_SIZE.
Ack.
>
> > + if (index_to_dp_signal_levels[i] == signal_levels)
> > + return i;
> > }
> >
> > - return level;
> > + WARN(1, "Unsupported voltage swing/pre-emphasis level: 0x%x\n",
> > + signal_levels);
> > +
> > + return 0;
> > }
> >
> > uint32_t ddi_signal_levels(struct intel_dp *intel_dp)
> > --
> > 2.10.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
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