On Tue, Nov 22, 2016 at 03:00:14PM +0200, Ville Syrjälä wrote:
> On Mon, Nov 21, 2016 at 02:24:06PM -0800, Bob Paauwe wrote:
> > For BXT, there is only one bit that enables/disables dual-link mode
> > and not different bits depending on which pipe is being used.
> >
> > Signed-off-by: Bob Paauwe <bob.j.paauwe@xxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/intel_dsi.c | 5 ++++-
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> > index 4e0d025..a35c141 100644
> > --- a/drivers/gpu/drm/i915/intel_dsi.c
> > +++ b/drivers/gpu/drm/i915/intel_dsi.c
> > @@ -476,7 +476,10 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder)
> > if (intel_dsi->ports == (BIT(PORT_A) | BIT(PORT_C))) {
> > temp |= (intel_dsi->dual_link - 1)
> > << DUAL_LINK_MODE_SHIFT;
> > - temp |= intel_crtc->pipe ?
> > + if (IS_BROXTON(dev_priv))
> > + temp |= LANE_CONFIGURATION_DUAL_LINK_A;
> > + else
> > + temp |= intel_crtc->pipe ?
> > LANE_CONFIGURATION_DUAL_LINK_B :
> > LANE_CONFIGURATION_DUAL_LINK_A;
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
And pushed to dinq. Thanks for the patch.
--
Ville Syrjälä
Intel OTC
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