From: "Lee, Shawn C" <shawn.c.lee@xxxxxxxxx> SPT_PWM_GRANULARITY (SOUTH_CHICKEN1, bit 0) controls the granularity (minimum increment) of the PWM backlight control counter. PWM frequency adjustment on 128 clock increments when this bit was 1. And 16 clock increments when it was 0. PWM frequency multiple octuple (from 200Hz to 1.6KHz) due to SPT_PWM_GRANULARITY was clear to 0 after S3. This patch save SOUTH_CHICKEN1 register value before suspend. And will restore it after i915 resume. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97486 Cc: Jani Nikula <jani.nikula@xxxxxxxxx> Reviewed-by: Cooper Chiou <cooper.chiou@xxxxxxxxx> Reviewed-by: Wei Shun Chen <wei.shun.chang@xxxxxxxxx> Reviewed-by: Gary C Wang <gary.c.wang@xxxxxxxxx> Signed-off-by: Shawn Lee <shawn.c.lee@xxxxxxxxx> --- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_panel.c | 24 ++++++++++++++++++++++-- 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 570a7ca..c4bc690 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -256,6 +256,7 @@ struct intel_panel { u32 level; u32 min; u32 max; + bool pwm_alternate_increment; bool enabled; bool combination_mode; /* gen 2/4 only */ bool active_low_pwm; diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index c10e9b0..e1dc6bd 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c @@ -841,7 +841,7 @@ static void lpt_enable_backlight(struct intel_connector *connector) { struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_panel *panel = &connector->panel; - u32 pch_ctl1, pch_ctl2; + u32 pch_ctl1, pch_ctl2, mul; pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { @@ -867,6 +867,16 @@ static void lpt_enable_backlight(struct intel_connector *connector) /* This won't stick until the above enable. */ intel_panel_actually_set_backlight(connector, panel->backlight.level); + + if (HAS_PCH_LPT(dev_priv)) { + mul = I915_READ(SOUTH_CHICKEN2); + mul &= ~LPT_PWM_GRANULARITY; + I915_WRITE(SOUTH_CHICKEN2, mul | (panel->backlight.pwm_alternate_increment << LPT_PWM_GRANULARITY)); + } else { + mul = I915_READ(SOUTH_CHICKEN1); + mul &= ~SPT_PWM_GRANULARITY; + I915_WRITE(SOUTH_CHICKEN1, mul | (panel->backlight.pwm_alternate_increment << SPT_PWM_GRANULARITY)); + } } static void pch_enable_backlight(struct intel_connector *connector) @@ -1413,7 +1423,7 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus { struct drm_i915_private *dev_priv = to_i915(connector->base.dev); struct intel_panel *panel = &connector->panel; - u32 pch_ctl1, pch_ctl2, val; + u32 pch_ctl1, pch_ctl2, val, mul; pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1); panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; @@ -1436,6 +1446,16 @@ static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unus panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; + if (HAS_PCH_LPT(dev_priv)) + mul = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; + else + mul = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; + + if ( mul ) + panel->backlight.pwm_alternate_increment = true; + else + panel->backlight.pwm_alternate_increment = false; + return 0; } -- 1.7.9.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
