On ma, 2016-08-01 at 10:11 +0100, Chris Wilson wrote: > > -uint32_t > -i915_gem_get_gtt_size(struct drm_device *dev, uint32_t size, int tiling_mode) > +/** > + * i915_gem_get_ggtt_size - return required global GTT size for an object > + * @dev: drm device > + * @size: object size > + * @tiling_mode: tiling mode > + * > + * Return the required GTT size for an object, taking into account + global -------^ > + * potential fence register mapping. > + */ > +u64 i915_gem_get_ggtt_size(struct drm_device *dev, u64 size, int tiling_mode) > { > - uint32_t gtt_size; > + u64 ggtt_size; > <snip> > - gtt_size <<= 1; > + while (ggtt_size < size) > + ggtt_size <<= 1; > > - return gtt_size; > + return ggtt_size; > } > > /** > - * i915_gem_get_gtt_alignment - return required GTT alignment for an object > + * i915_gem_get_ggtt_alignment - return required GTT alignment for an object + global -----^ > * @dev: drm device > * @size: object size > * @tiling_mode: tiling mode > @@ -1875,15 +1885,16 @@ i915_gem_get_gtt_size(struct drm_device *dev, uint32_t size, int tiling_mode) > * Return the required GTT alignment for an object, taking into account + global ---------^ With those, Reviewed-by: Joonas Lahtinen <joonas.lahtinen@xxxxxxxxxxxxxxx> Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx