Moving all GPU features to the platform definition allows for - standard place when adding new features from new platforms - possible to see supported features when dumping struct definitions Signed-off-by: Carlos Santa <carlos.santa@xxxxxxxxx> --- drivers/gpu/drm/i915/i915_drv.h | 3 ++- drivers/gpu/drm/i915/i915_pci.c | 4 ++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 510bab6..4451aa1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -783,6 +783,7 @@ struct intel_csr { func(has_aux_irq) sep \ func(has_gmbus_irq) sep \ func(has_fw_blc) sep \ + func(has_hw_contexts) sep \ func(has_pipe_cxsr) sep \ func(has_hotplug) sep \ func(cursor_needs_physical) sep \ @@ -2699,7 +2700,7 @@ struct drm_i915_cmd_table { HAS_EDRAM(dev)) #define I915_NEED_GFX_HWS(dev) (INTEL_INFO(dev)->need_gfx_hws) -#define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 6) +#define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->has_hw_contexts) #define HAS_LOGICAL_RING_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 8) #define USES_PPGTT(dev) (i915.enable_ppgtt) #define USES_FULL_PPGTT(dev) (i915.enable_ppgtt >= 2) diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 0df6911..604aead 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -194,6 +194,7 @@ static const struct intel_device_info intel_ironlake_m_info = { .has_core_ring_freq = 1, \ .has_rc6 = 1, \ .has_rc6p = 1, \ + .has_hw_contexts = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .has_llc = 1 @@ -238,6 +239,7 @@ static const struct intel_device_info intel_ivybridge_q_info = { .has_aux_irq = 1, \ .has_gmbus_irq = 1, \ .has_fw_blc = 1, \ + .has_hw_contexts = 1, \ .need_gfx_hws = 1, .has_hotplug = 1, \ .ring_mask = RENDER_RING | BSD_RING | BLT_RING, \ .display_mmio_offset = VLV_DISPLAY_BASE, \ @@ -319,6 +321,7 @@ static const struct intel_device_info intel_cherryview_info = { .has_aux_irq = 1, .has_gmbus_irq = 1, .has_fw_blc = 1, + .has_hw_contexts = 1, .display_mmio_offset = VLV_DISPLAY_BASE, GEN_CHV_PIPEOFFSETS, CURSOR_OFFSETS, @@ -357,6 +360,7 @@ static const struct intel_device_info intel_broxton_info = { .has_dp_mst = 1, .has_aux_irq = 1, .has_gmbus_irq = 1, + .has_hw_contexts = 1, GEN_DEFAULT_PIPEOFFSETS, IVB_CURSOR_OFFSETS, BDW_COLORS, -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx