Hello, I am using gcc-arm-none-eabi with a cortex M7 device, with caches (data/instruction) enabled. Nested function calls result in a usage fault because there is no clear cache call for this platform. Is there a way to provide the required functions without rebuilding gcc? I have been looking at the source and, as far as I can tell, there is not. But there also doesn't look to be a clean way to implement this: It appears that this is done on an operating system basis, and when running bare metal it is not clear where the code would live. There are also at least two approaches to solve it, I guess: 1. Somehow indicate on the command line (via target or a dedicated option) to emit the clear cache call for cortex M, and I guess that the function itself should do nothing if both caches are disabled. 2. Define hooks or provide a command line option so that developers can provide an implementation for their platform? Assuming I were to do this the improper way (and just create a build that works only for my particular target): Where should I define CLEAR_INSN_CACHE? I am not sure if there is already a way to do all this that I am just unaware of? Many thanks, Ed Robbins
