On 28/06/17 10:24, Andrew Haley wrote: > On 28/06/17 08:33, Toebs Douglass wrote: >> Yes. I wonder why ARM did that. Unless the internal implementation is >> different (no ERG) > > ERG? Exclusive Reservation Granule. >> then it seems just a wrapper for an LL/SC loop, and for me it's hard >> to imagine that being worth an instruction. > > It avoids ping-ponging between cache lines on a highly-contended large > system. A CAS can be performed remotely from the processor that is > executing the instruction, without moving the data into its cache. Oh my! Right, I'm having that! :-)
