Re: Specifics of `BASE_REG_CLASS` macro?

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On Fri, Mar 31, 2017 at 09:39:27AM -0600, Jeff Law wrote:
> >​I am curious as to why (SP + offset) dereferencing is so problematic,
> >as compared to the general registers; could you elaborate?
> It's potentially problematic because you don't generally have reg+offset 
> addressing modes.  Whether or not it actually causes a problem could 
> well depend on other aspects of your target and things like reload's 
> assumptions about how it can manipulate an insn.

(I hope you are using LRA instead of reload, for a new port!)

To expand on Jeff's comments a bit:

If reload/LRA needs to spill a register it ends up on the stack, and
things there are naturally accessed using sp+off addressing.  If you
do not support such addressing (or your arch doesn't, even), then
reload will need to spill more, to free up another register (or two)
for reg+reg addressing (where one reg is sp, the other is that offset),
and you get pretty nasty code as a result.


Segher



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