On 03/31/2017 09:29 AM, Maxim Blinov wrote:
I would define BASE_REG_CLASS to be any register that can be used for
simple indirect addressing (that's the same as base+index with a zero
index) and the stack pointer. It may not matter much in the end though.
Ok.
I think we've supported ports with similar restrictions in the past
(ia64?). My biggest worry would be in trying to still allow sp+offset.
You might consider not allowing sp+offset initially until you've got
things mostly working, then look at allow sp+offset in limited cases to
improve the generated code.
I am curious as to why (SP + offset) dereferencing is so problematic,
as compared to the general registers; could you elaborate?
It's potentially problematic because you don't generally have reg+offset
addressing modes. Whether or not it actually causes a problem could
well depend on other aspects of your target and things like reload's
assumptions about how it can manipulate an insn.
So I would start by first ignoring that capability (sp+offset) and get
the port running just using simple register indirect addressing modes.
Then I'd look to try and exploit the ability to handle sp+offset. That
way you can compare the before/after test results to help identify
problematical areas.
P.S. When I reply, does it suffice to reply to `gcc-help`, or should I
also add you to the CC list?
gcc-help is sufficient.
jeff
