On 02 Aug 2014, at 09:02, Marc Glisse <marc.glisse@xxxxxxxx> wrote: > On Fri, 1 Aug 2014, Cherry Vanc wrote: > >> I need to fuse multiple instructions into a single one. >> ... >> r1 = (r1) op1 (const) >> ... >> ... >> r1 = (r1) op2 (r2) >> ... >> ... >> r3 = op3 (r1) >> ... >> >> I defined a peephole2 pattern in my GCC backend .md file. If these >> three instructions are contiguous, then I do get my test "testnew" >> instruction. If these instructions are far apart, I dont. >> >> (define_peephole2 >> [(set (match_operand:DI 0 "register_operand" "") >> (op1:DI (match_dup 0) (match_operand:SI 1 "immediate_operand" "") )) >> (set (match_dup 0) >> (op2:DI (match_operand:DI 2 "register_operand" "") (match_dup 0))) >> (set (match_dup 0) >> (sign_extend:DI (op3:SI (match_dup 0))))] >> "TARGET_MYCORE" >> [(set (match_dup 0) (sign_extend:DI (op3:SI (op2:SI (op1:SI >> (match_dup 0) (match_dup 1)) (match_dup 0)))))] >> "") >> >> (define_insn "*testnew" >> [(set (match_operand:DI 0 "register_operand" "=d") >> (sign_extend:DI (op3:SI (op2:SI (op1:SI (match_dup 0) >> (match_operand:SI 1 "immediate_operand" "I")) (match_dup 0)))))] >> "TARGET_MYCORE" >> "testnew 36" >> [(set_attr "mode" "DI")]) >> >> How can I fuse multiple instructions that are far apart into a new >> single opcode that MYCORE has ? > > Hello, > > I probably haven't looked closely enough, but could you explain why the 'combine' pass isn't already doing what you want? Yes, this kind of stuff is usually done using the combine pass. However, it will not try out all permutations of instructions, but rather follow some rules. Thus the patterns in the .md have to match combine's expectations. To see which patterns it tries out, look at the rtl pass dump. From there it should rather easy to write down the expected pattern. Notice also that sometimes patterns will not be picked if the rtx costs are off. Again, see combine's log for when this happens. Cheers, Oleg
