On Fri, 5 Apr 2013, Andrew Haley wrote:
Well, that was what I wanted to find out, do I need error handling if the
event of a colliction (two cores exectuing CMPXCHG within the same clock
cycles), the instruction will be automaticly retried until it succeeds?
Correct.
Is that true for the x86 asm implementations of __atomic_*_fetch /
__atomic_fetch_* calls too, that they are retried?
Which x86 asm implementations do you mean? We're talking about
GCC here, and it has builtins.
I was refering to the internal GCC implementation of the builtin
functions:
__atomic_add_fetch
__atomic_sub_fetch
__atomic_and_fetch
__atomic_xor_fetch
etc..
I'd assume there is a separate assembler implementaion for each
processor architecture (x86, SPARC, MIPS, ARM, etc).
Thanks for the help!
Regards,
Bjorn
