On 04/13/2012 02:24 PM, Amir Ghanbari wrote: > The problem is that the binary being generated is not exactly what I > want. when I simulate my code, I get an "invalid opcode" error and the > address of the instruction is exactly where the disassembly get > screwed up. So I believe that's what's happening. I need to make GCC > treat that "F0 0F 23" as an instruction and put it in the binary > intact and don't mix it with other instructions. GCC has done that. It's here: >>> f0 0f lock mov (bad),%db1" >>> 23 48 89 and -0x77(%rax),%ecx" This is your f0 0f 23, just as you asked. Andrew.
