Hello,
I use a NXP LPC2478 and I probably have a problem with its ARM7TDMI-S core.
The following instruction will be not executed according to the specification
(ARM Architecture Reference Manual, Issue I):
stmia r3!, {r1-r3}
The specification says (page A7-96):
Finally, the base register <Rn> is incremented by 4 times the numbers of
registers in <registers>.
This means the original value of r3 should be written to memory. This is not
the case. Instead the new value will be written to memory.
Previous GCC versions (before 4.6) generated less optimal code and did not use
a stmia here.
Now my GCC question:
I can prevent the stmia instruction if I use the -fno-peephole2 option.
According to the command line help this disables "an RTL peephole pass before
sched2". Do I loose a big potential for optimizations here?
Have a nice day!
--
Sebastian Huber, embedded brains GmbH
Address : Obere Lagerstr. 30, D-82178 Puchheim, Germany
Phone : +49 89 18 90 80 79-6
Fax : +49 89 18 90 80 79-9
E-Mail : sebastian.huber@xxxxxxxxxxxxxxxxxx
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
