Hi!
First: Rask, thanks for your help!
I'm compiling the C code int a, c; void var_assign(void) { c = a; }
and get the error:
var_assign.c:20: error: insn does not satisfy its constraints:
(insn 8 21 9 (set (reg:SI 1 R1 [orig:101 a.0 ] [101])
(mem/c/i:SI (reg:SI 2 R2) [0 a+0 S4 A32])) 79 {movsi} (nil)
(nil))
var_assign.c:20: internal compiler error: in final_scan_insn, at
final.c:2382
Again, a data register is used as address pointer, which is
rejected in GO_IF_...
In .lreg:
Register 101 costs: Rx_REGS:0 Ax_REGS:0 GENERAL_REGS:0 ALL_REGS:0
MEM:4000
Register 102 costs: Rx_REGS:1000 Ax_REGS:0 GENERAL_REGS:1000
ALL_REGS:1000 MEM:4000
Seems to be good for registers 101 and 102 in insn 8 (see below)
Register 101 pref Rx_REGS or none
Register 102 pref Ax_REGS, else Rx_REGS
Again, ok.
(insn 8 7 9 3 (set (reg:SI 101 [ a.0 ])
(mem/c/i:SI (reg/f:SI 102) [0 a+0 S4 A32])) 79 {movsi} (nil)
(expr_list:REG_DEAD (reg/f:SI 102)
(nil)))
In .greg:
Reload 0: reload_in (SI) = (reg/f:SI 0 R0 [102])
Ax_REGS, RELOAD_FOR_OPERAND_ADDRESS (opnum = 1)
reload_in_reg: (reg/f:SI 0 R0 [102])
reload_reg_rtx: (reg:SI 2 R2)
*** R0 and R2 are not in register set Ax!
Reloads for insn # 10
Reload 0: reload_in (SI) = (reg/f:SI 0 R0 [103])
Ax_REGS, RELOAD_FOR_OPERAND_ADDRESS (opnum = 0)
reload_in_reg: (reg/f:SI 0 R0 [103])
reload_reg_rtx: (reg:SI 34 A2)
*** A2 is in set Ax.
;; Register dispositions:
101 in 1 102 in 0 103 in 0
;; Hard regs used: 0 1 2 34 46 66
*** 66? This is impossible!! There is no register set that contains
that register! Is there a problem with my register set definition?
#define REG_CLASS_CONTENTS {\
{ 0x00000000 ,0x00000000 ,0x00000000 } /* NO_regs */ \
,{ 0xffffffff ,0x00000000 ,0x00000000 } /* Rx */ \
,{ 0x00000000 ,0x00001fff ,0x00000000 } /* Ax */ \
,{ 0x00000000 ,0x00000000 ,0x00000000 } /* SBx */ \
,{ 0x00000000 ,0x00000000 ,0x00000000 } /* Bx */ \
,{ 0x00000000 ,0x00000000 ,0x00000000 } /* SIx */ \
,{ 0x00000000 ,0x00000000 ,0x00000000 } /* IBx */ \
,{ 0xffffffff ,0x0000ffff ,0x00000000 } /* GENERAL */ \
,{ 0xffffffff ,0x0000ffff ,0x00000000 } /* ALL */ \
}
(insn 7 5 21 3 (set (reg/f:SI 0 R0 [102])
(symbol_ref:SI ("a") <var_decl 0x41695360 a>)) 79 {movsi} (nil)
(nil))
(insn 21 7 8 3 (set (reg:SI 2 R2)
(reg/f:SI 0 R0 [102])) 79 {movsi} (nil)
(nil))
*** Why was this movsi instruction (insn 21) inserted? It should move
R0 to an address register.
(insn 8 21 9 3 (set (reg:SI 1 R1 [orig:101 a.0 ] [101])
(mem/c/i:SI (reg:SI 2 R2) [0 a+0 S4 A32])) 79 {movsi} (nil)
(nil))
*** There should be an address register instead of R2.
(insn 9 8 22 3 (set (reg/f:SI 0 R0 [103])
(symbol_ref:SI ("c") <var_decl 0x416953c0 c>)) 79 {movsi} (nil)
(nil))
(insn 22 9 10 3 (set (reg:SI 34 A2)
(reg/f:SI 0 R0 [103])) 79 {movsi} (nil)
(nil))
(insn 10 22 11 3 (set (mem/c/i:SI (reg:SI 34 A2) [0 c+0 S4 A32])
(reg:SI 1 R1 [orig:101 a.0 ] [101])) 79 {movsi} (nil)
(nil))
*** This one is correct.
There seems to be a problem with my mov<mode> instruction?
(define_insn "mov<mode>"
[(set (match_operand:ALLMT 0 "nonimmediate_operand" "=Rx, Ax, Rx,
Ax, r, m, r")
(match_operand:ALLMT 1 "general_operand" " Rx, Ax, Ax, Rx,
<iF>, r, m"))]
Might be sub-optimal, but ok. I proclaim that my code is correct -
but it is not correct. Where should I start searching?
Thanks,
Boris