Hi!
I'm working on a gcc (4.2.1) back-end for a new architecture (no
silicon yet). I started with the CRX back-end, because it was the
smallest one. Btw, yes, I've read "Porting GCC for dunces" and some
parts of the internals document ;-)
Somehow this seems to be a FAQ, but I can't find the correct answer.
The architecture has data and address registers (ala m68k) and for
the C code
int c;
void f(void){c=4711;}
I get the code:
MV_WI32 R0, #_c /* movsi Ax */
MV_WI32 R1, #4711 /* movsi Ax */
MV_WW A1, R0 /* movsi r */
store_D 0(A1), R1 /* movsi */
The very first line is wrong, because there is a register
constraint for address registers:
(define_insn "mov<mode>"
[(set (match_operand:ALLMT 0 "nonimmediate_operand" "=r, Ax,
Rx, m, r")
(match_operand:ALLMT 1 "general_operand" " r, <iF>, <iF>, r, m"))]
""
"@
MV_%M0%M1\t%0, %1 \t/* mov<mode> r */
MV_%M0%M1\t%0, %1 \t/* mov<mode> Ax */
MV_%M0%M1\t%0, %1 \t/* mov<mode> Rx */
store_%M0\t%0, %1 \t/* mov<mode> */
load_%M0\t%0, %1 \t/* mov<mode> */"
[(set_attr "length" "4,4,4,4,4")]
)
The register sets Ax and Rx do not share any registers! Hm, I can
only think of placing the symbol in R0 with the third alternative and
then move again with the first alternative?!
This strange thing goes on:
int a, b, c;
void add_var(){c = a + b;}
results in:
add_var.c: In function 'add_var':
add_var.c:20: error: insn does not satisfy its constraints:
(insn 8 24 9 (set (reg:SI 1 R1 [orig:103 a.0 ] [103])
(mem/c/i:SI (reg:SI 2 R2) [0 a+0 S4 A32])) 79 {movsi} (nil)
(nil))
add_var.c:20: internal compiler error: in final_scan_insn, at final.c:
2382
The error happens, because GO_IF_LEGITIMATE_ADDRESS (strict
version) detects, that a data register is used like an address
register - that's illegal! (BASE_REG_CLASS is defined to Ax_REGS)
So, where can I start my search to resolve this?
Thanks in advance,
Boris Boesler